User Manuals: Winbond W632GG6KB15I DDR3 Memory IC

Manuals and User Guides for Winbond W632GG6KB15I DDR3 Memory IC. We have 1 Winbond W632GG6KB15I DDR3 Memory IC manual available for free PDF download: Manual

Winbond W632GG6KB15I Manual

Winbond W632GG6KB15I Manual (159 pages)

16M 8 BANKS 16 BIT DDR3 SDRAM

Brand: Winbond | Category: Storage | Size: 5 MB

Table of Contents

Table of Contents
1
1 General Description

5
2 Features

5
3 Order Information

6
4 Key Parameters

7
5 Ball Configuration

8
6 Ball Description

9
7 Block Diagram

11
8 Functional Description

12
- Basic Functionality
  12
- RESET and Initialization Procedure
  12
  - Power-Up Initialization Sequence
    12
  - Reset Initialization with Stable Power
    14
- Programming the Mode Registers
  15
  - Mode Register MR0
    17
    
    Burst Length, Type and Order
    18
    
    CAS Latency
    18
    
    Test Mode
    19
    
    DLL Reset
    19
    
    Write Recovery
    19
    
    Precharge PD DLL
    19
  - Mode Register MR1
    20
    
    DLL Enable/Disable
    20
    
    Output Driver Impedance Control
    21
    
    ODT RTT Values
    21
    
    Additive Latency (AL)
    21
    
    Write Leveling
    21
    
    Output Disable
    21
  - Mode Register MR2
    22
    
    Partial Array Self Refresh (PASR)
    23
    
    CAS Write Latency (CWL)
    23
    
    Auto Self Refresh (ASR) and Self Refresh Temperature (SRT)
    23
    
    Dynamic ODT (Rtt_Wr)
    23
  - Mode Register MR3
    24
    
    Multi Purpose Register (MPR)
    24
- No Operation (NOP) Command
  25
- Deselect Command
  25
- DLL-Off Mode
  25
- DLL On/Off Switching Procedure
  26
  - DLL "On" to DLL "Off" Procedure
    26
  - DLL "Off" to DLL "On" Procedure
    27
- Input Clock Frequency Change
  28
  - Frequency Change During Self-Refresh
    28
  - Frequency Change During Precharge Power-Down
    28
- Write Leveling
  30
- Multi Purpose Register
  34
  - MPR Functional Description
    35
  - MPR Register Address Definition
    36
  - Relevant Timing Parameters
    36
  - Protocol Example
    36
- ACTIVE Command
  42
- PRECHARGE Command
  42
- READ Operation
  43
  - READ Burst Operation
    43
  - READ Timing Definitions
    44
    
    READ Timing; Clock to Data Strobe Relationship
    45
    
    READ Timing; Data Strobe to Data Relationship
    46
    
    Tlz(Dqs), Tlz(DQ), Thz(DQS), Thz(DQ) Calculation
    47
    
    Trpre Calculation
    48
    
    Trpst Calculation
    48
    
    Burst Read Operation Followed by a Precharge
    54
- WRITE Operation
  56
  - DDR3 Burst Operation
    56
  - WRITE Timing Violations
    56
    
    Motivation
    56
    
    Data Setup and Hold Violations
    56
    
    Strobe to Strobe and Strobe to Clock Violations
    56
    
    Write Timing Parameters
    56
  - Write Data Mask
    57
  - Twpre Calculation
    58
  - Twpst Calculation
    58
- Refresh Command
  65
- Self-Refresh Operation
  67
- Power-Down Modes
  69
- ZQ Calibration Commands
  77
- On-Die Termination (ODT)
  79
9 Operation Mode

94
- Command Truth Table
  94
- CKE Truth Table
  96
- Simplified State Diagram
  97
10 Electrical Characteristics

98
11 Package Specification

158
12 Revision History

159

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