Sign In
Upload
Manuals
Brands
Winbond Manuals
Storage
W632GG6KB-11
Winbond W632GG6KB-11 DDR3 SDRAM Memory Manuals
Manuals and User Guides for Winbond W632GG6KB-11 DDR3 SDRAM Memory. We have
1
Winbond W632GG6KB-11 DDR3 SDRAM Memory manual available for free PDF download: Manual
Winbond W632GG6KB-11 Manual (159 pages)
16M 8 BANKS 16 BIT DDR3 SDRAM
Brand:
Winbond
| Category:
Storage
| Size: 5 MB
Table of Contents
Table of Contents
1
1 General Description
5
2 Features
5
3 Order Information
6
4 Key Parameters
7
5 Ball Configuration
8
6 Ball Description
9
7 Block Diagram
11
8 Functional Description
12
Basic Functionality
12
RESET and Initialization Procedure
12
Power-Up Initialization Sequence
12
Reset Initialization with Stable Power
14
Programming the Mode Registers
15
Mode Register MR0
17
Burst Length, Type and Order
18
CAS Latency
18
Test Mode
19
DLL Reset
19
Write Recovery
19
Precharge PD DLL
19
Mode Register MR1
20
DLL Enable/Disable
20
Output Driver Impedance Control
21
ODT RTT Values
21
Additive Latency (AL)
21
Write Leveling
21
Output Disable
21
Mode Register MR2
22
Partial Array Self Refresh (PASR)
23
CAS Write Latency (CWL)
23
Auto Self Refresh (ASR) and Self Refresh Temperature (SRT)
23
Dynamic ODT (Rtt_Wr)
23
Mode Register MR3
24
Multi Purpose Register (MPR)
24
No Operation (NOP) Command
25
Deselect Command
25
DLL-Off Mode
25
DLL On/Off Switching Procedure
26
DLL "On" to DLL "Off" Procedure
26
DLL "Off" to DLL "On" Procedure
27
Input Clock Frequency Change
28
Frequency Change During Self-Refresh
28
Frequency Change During Precharge Power-Down
28
Write Leveling
30
DRAM Setting for Write Leveling & DRAM Termination Function in that Mode
31
Write Leveling Procedure
31
Write Leveling Mode Exit
33
Multi Purpose Register
34
MPR Functional Description
35
MPR Register Address Definition
36
Relevant Timing Parameters
36
Protocol Example
36
ACTIVE Command
42
PRECHARGE Command
42
READ Operation
43
READ Burst Operation
43
READ Timing Definitions
44
READ Timing; Clock to Data Strobe Relationship
45
READ Timing; Data Strobe to Data Relationship
46
Tlz(Dqs), Tlz(DQ), Thz(DQS), Thz(DQ) Calculation
47
Trpre Calculation
48
Trpst Calculation
48
Burst Read Operation Followed by a Precharge
54
WRITE Operation
56
DDR3 Burst Operation
56
WRITE Timing Violations
56
Motivation
56
Data Setup and Hold Violations
56
Strobe to Strobe and Strobe to Clock Violations
56
Write Timing Parameters
56
Write Data Mask
57
Twpre Calculation
58
Twpst Calculation
58
Refresh Command
65
Self-Refresh Operation
67
Power-Down Modes
69
Power-Down Entry and Exit
69
Power-Down Clarifications - Case 1
75
Power-Down Clarifications - Case 2
75
Power-Down Clarifications - Case 3
76
ZQ Calibration Commands
77
ZQ Calibration Description
77
ZQ Calibration Timing
78
ZQ External Resistor Value, Tolerance, and Capacitive Loading
78
On-Die Termination (ODT)
79
ODT Mode Register and ODT Truth Table
79
Synchronous ODT Mode
80
ODT Latency and Posted ODT
80
Timing Parameters
80
ODT During Reads
82
Dynamic ODT
83
Functional Description
83
ODT Timing Diagrams
84
Asynchronous ODT Mode
88
Synchronous to Asynchronous ODT Mode Transitions
89
Synchronous to Asynchronous ODT Mode Transition During Power-Down Entry
89
Asynchronous to Synchronous ODT Mode Transition During Power-Down Exit
92
Asynchronous to Synchronous ODT Mode During Short CKE High and Short CKE Low Periods
93
9 Operation Mode
94
Command Truth Table
94
CKE Truth Table
96
Simplified State Diagram
97
10 Electrical Characteristics
98
Absolute Maximum Ratings
98
Operating Temperature Condition
98
DC & AC Operating Conditions
98
Recommended DC Operating Conditions
98
Input and Output Leakage Currents
99
Interface Test Conditions
99
DC and AC Input Measurement Levels
100
DC and AC Input Levels for Single-Ended Command and Address Signals
100
DC and AC Input Levels for Single-Ended Data Signals
101
Differential Swing Requirements for Clock (CK - CK#) and Strobe (DQS - DQS#)
103
Single-Ended Requirements for Differential Signals
104
Differential Input Cross Point Voltage
105
Slew Rate Definitions for Single-Ended Input Signals
106
Slew Rate Definitions for Differential Input Signals
106
DC and AC Output Measurement Levels
107
Output Slew Rate Definition and Requirements
107
Single Ended Output Slew Rate
108
Differential Output Slew Rate
109
Ohm Output Driver DC Electrical Characteristics
110
Output Driver Temperature and Voltage Sensitivity
112
On-Die Termination (ODT) Levels and Characteristics
113
ODT Levels and I-V Characteristics
113
ODT DC Electrical Characteristics
114
ODT Temperature and Voltage Sensitivity
114
Design Guide Lines for RTT PU and RTT PD
115
ODT Timing Definitions
116
Test Load for ODT Timings
116
Input/Output Capacitance
120
Overshoot and Undershoot Specifications
121
AC Overshoot /Undershoot Specification for Address and Control Pins
121
AC Overshoot /Undershoot Specification for Clock, Data, Strobe and Mask Pins
121
IDD and IDDQ Specification Parameters and Test Conditions
122
IDD and IDDQ Measurement Conditions
122
IDD Current Specifications
132
Clock Specification
133
Speed Bins
134
DDR3-1333 Speed bin and Operating Conditions
134
DDR3-1600 Speed bin and Operating Conditions
135
DDR3-1866 Speed bin and Operating Conditions
136
Speed bin General Notes
137
AC Characteristics
138
AC Timing and Operating Condition for -11 Speed Grade
138
AC Timing and Operating Condition for -12/12I/-15/15I Speed Grades
142
Timing Parameter Notes
146
Address / Command Setup, Hold and Derating
149
Data Setup, Hold and Slew Rate Derating
156
11 Package Specification
158
12 Revision History
159
Advertisement
Advertisement
Related Products
Winbond W632GG6KB Series
Winbond W632GG6KB-12
Winbond W632GG6KB12I
Winbond W632GG6KB-15
Winbond W632GG6KB15I
Winbond W632GU6NB09J
Winbond W632GU6NB-11
Winbond W632GU6NB12I
Winbond W632GU6NB15I
Winbond W632GU6NB15J
Winbond Categories
Microcontrollers
Computer Hardware
I/O Systems
Storage
Motherboard
More Winbond Manuals
Login
Sign In
OR
Sign in with Facebook
Sign in with Google
Upload manual
Upload from disk
Upload from URL