Vaisala RVP900 Receiver Signal Processor Manuals

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Vaisala RVP900 User Manual (484 pages)

Digital Receiver and Signal Processor

Brand: Vaisala | Category: Receiver | Size: 8.27 MB

Table of Contents
3
1 About this Document

15
- Version Information
  15
- Related Documents
  15
- Table Document Versions
  15
- Table 2 Weather Radar Documentation
  15
- Documentation Conventions
  16
- Trademarks
  16
2 Product Overview

17
- RVP900 Product Architecture
  17
- Regulatory Compliances
  18
  - WEEE Compliance
    18
  - Rohs Compliance
    18
- Safety
  20
  - ESD Protection
    21
- Product Nomenclature
  21
- Table 3 RVP900 Nomenclature
  21
3 Functional Description

23
4 RVP Hardware

55
5 TTY Non-Volatile Setups

89
- Using the TTY Setup Menu
  89
- Managing Settings with M Menus
  94
  - Mb - Burst Pulse and AFC
    95
  - Table 29 Analysis Window Options
    97
  - Table 30 AFC Output Process for Internal AFC Feedback
    100
  - MC - Top-Level Configuration
    104
  - Mf - Clutter Filters
    106
  - Mp - Processing Options
    109
  - Mt - General Trigger Setups
    115
  - Mt<N> - Triggers for Pulsewidth N
    118
  - Table 31 PRF Protection Limits Considerations
    120
  - Table 32 Filter Length Considerations
    121
  - Table 33 Linear FM Class Examples
    127
  - Mz - Transmissions and Modulations
    128
  - M+ Debug Options
    129
6 Plot-Assisted Setups

131
7 Processing Algorithms

171
8 Host Computer Commands

237
9 Technical Data

331
- Signal Processing
  331
- RVP900 Processing Algorithms
  331
- Table 72 Signal Processing
  331
- Table 73 Processing Algorithms
  331
- RVP900 Input and Output Summary
  332
- Table 74 I/O Summary
  332
- RVP901 IFDR Specifications
  333
- Table 75 if Band Pass Filter
  333
- Table 76 if Inputs
  333
- Table 77 Phase Stability
  334
- Table 78 if Waveform Generator
  334
- Table 79 RVP901 IFDR I/O
  334
- RVP901 Digital Waveform Synthesis
  335
- Table 80 RVP901 IFDR Physical Specifications
  335
- Table 81 Digital Waveform Synthesis
  335
- RVP902 Signal Processing Computer Specifications
  336
- Table 82 Physical and Environmental Characteristics
  336
- RVP902 Safety Compliance
  337
- Table 83 RVP902 Safety Compliance
  337
- RVP900 Spare Parts
  338
- Physical and Environmental Characteristics
  338
- Table 84 RVP900 Spare Parts
  338
- Table 85 RVP902-IO Spare Parts
  338
- Table 86 Physical and Environmental Characteristics
  338
- Type Plate
  339
- Figure 52 RVP902 Type Plate
  339
- Figure 53 RVP902-IO Type Plate
  340
Appendix A: Installation and Test Procedures

341
Appendix B: RVP901 IFDR Technical Drawings

371
Appendix C: RVP900 Developer Notes

373
Appendix D: Time Series Recording

391
Appendix E: Serial Status Formats

419
- Table 122 Internal BITE Packet (RVP900 to Host)
  419
- Table 123 Internal QBITE Packet (RVP900 to Host)
  424
Appendix F: Softplane.conf

425
Appendix G: RCP903 ASR9-WSP Panel

431

Vaisala RVP900 User Manual (512 pages)

Digital Receiver and Signal Processor

Brand: Vaisala | Category: Receiver | Size: 7.07 MB

Table of Contents
3
Chapter 1 General Information

13
- About this Manual
  
  13
  - Contents of this Manual
    13
- Version Information
  
  15
- Related Manuals
  
  15
- Documentation Conventions
  
  15
- Safety
  
  16
  - ESD Protection
    16
- Regulatory Compliances
  
  17
- WEEE Compliance
  
  17
  - Recycling
    17
- Rohs Compliance
  
  17
  - China Rohs Compliance
    17
- Trademarks
  
  18
- License Agreement
  
  19
- Warranty
  
  19
  - Hardware Limited Warranty
    19
Chapter 2 Introduction and Specifications

21
Chapter 3 Hardware Installation

65
Chapter 4 Tty Nonvolatile Setups

101
- Overview of Setup Procedures
  
  101
- View/Modify Dialogs
  
  107
  - MC - Top Level Configuration
    108
  - Mp - Processing Options
    110
  - Mf - Clutter Filters
    116
  - Mt - General Trigger Setups
    118
  - Mt<N>- Triggers for Pulsewidth #N
    121
  - Mb - Burst Pulse and AFC
    130
  - M+ - Debug Options
    139
  - Mz - Transmissions and Modulations
    140
Chapter 5 Plot-Assisted Setups

143
- P+ - Plot Test Pattern
  
  144
- General Conventions Within the Plot Commands
  
  145
- Pb - Plot Burst Pulse Timing
  
  147
- Ps - Plot Burst Spectra and AFC
  
  152
  - Interpreting the Burst Spectra Plots
    153
  - Available Subcommands Within Ps
    155
  - TTY Information Lines Within Ps
    158
  - Computation of Filter Loss
    160
  - Recommended Adjustment Procedures
    164
- Pr - Plot Receiver Waveforms
  
  167
- Pa - Plot Tx Waveform Ambiguity
  
  172
  - Interpreting the Ambiguity Plots
    173
  - Available Subcommands Within Pa
    175
  - TTY Information Lines Within Pa
    178
  - Bench Testing of Compressed Waveforms
    179
  - Processing Algorithms
    183
Chapter 6 Processing Algorithms

183
- IF Signal Processing
  
  187
  - FIR (Matched) Filter
    187
  - RVP900 Receiver Modes
    189
  - Automatic Frequency Control (AFC)
    191
  - Burst Pulse Tracking
    192
  - Interference Filter
    193
  - Large-Signal Linearization
    197
  - Correction for Tx Power Fluctuations
    198
- Time Series (I and Q) Signal Processing
  
  199
- Autocorrelation R(N) Processing
  
  218
  - Point Clutter Remover
    218
  - Range Averaging and Clutter Microsuppression
    219
  - Reflectivity
    219
  - Velocity
    222
  - Spectrum Width Algorithms
    223
  - Signal Quality Index (SQI Threshold)
    225
  - Clutter Correction (CCOR Threshold)
    225
  - Weather Signal Power (SIG Threshold)
    227
  - Signal+Noise)/Noise Ratio (LOG Threshold)
    228
- Thresholding
  
  228
  - Threshold Qualifiers
    228
  - Adjusting Threshold Qualifiers
    230
  - Speckle Filters
    231
- Reflectivity Calibration
  
  235
- Dual PRT Processing Mode
  
  242
  - DPRT-1 Mode
    242
  - DPRT-2 Mode
    244
- Dual PRF Velocity Unfolding
  
  244
- Random Phase Second Trip Processing
  
  249
  - Overview
    249
  - Algorithm
    250
  - Tuning for Optimal Performance
    251
- Signal Generator Testing of the Algorithms
  
  255
  - Linear Ramp of Velocity with Range
    255
  - Verifying PHIDP and KDP
    256
  - Verifying RHOH, RHOV, and RHOHV
    256
Chapter 7 Host Computer Commands

259
- No-Operation (NOP)
  
  261
- Load Range Mask (LRMSK)
  
  261
- Setup Operating Parameters (SOPRM)
  
  263
- Interface Input/Output Test (IOTEST)
  
  274
- Interface Output Test (OTEST)
  
  275
- Sample Noise Level (SNOISE)
  
  276
- Initiate Processing (PROC)
  
  279
- Load Clutter Filter Flags (LFILT)
  
  292
- Get Processor Parameters (GPARM)
  
  294
- Load Simulated Time Series Data (LSIMUL)
  
  308
- Reset (RESET)
  
  311
- Define Trigger Generator Waveforms (TRIGWF)
  
  311
- Define Pulse Width Control and PRT Limits (PWINFO)
  
  313
- Set Pulse Width and PRF (SETPWF)
  
  315
- Load Antenna Synchronization Table (LSYNC)
  
  316
- Set/Clear User LED (SLED)
  
  319
- TTY Operation (TTYOP)
  
  320
- Load Custom Range Normalization (LDRNV)
  
  322
- Read Back Internal Tables and Parameters (RBACK)
  
  323
- Pass Auxiliary Arguments to Opcodes (XARGS)
  
  324
- Load Clutter Filter Specifications (LFSPECS)
  
  325
- Configure Ray Header Words (CFGHDR)
  
  327
- Configure Interference Filter (CFGINTF)
  
  328
- Set AFC Level (SETAFC)
  
  329
- Set Trigger Timing Slew (SETSLEW)
  
  330
- Hunt for Burst Pulse (BPHUNT)
  
  330
- Configure Phase Modulation (CFGPHZ)
  
  331
- Set User IQ Bits (UIQBITS)
  
  332
- Set Individual Thresholds (THRESH)
  
  333
- Set Task Identification Information (TASKID)
  
  335
- Define PRF Pie Slices (PRFSECT)
  
  336
- Configure Target Simulator (TARGSIM)
  
  337
- Set Burst Pulse Processing Options (BPOPTS)
  
  339
- Custom User Opcode (USRINTR and USRCONT)
  
  340
- Load Melting Layer Specification (MLSPEC)
  
  340
Appendix Aserial Status Formats

345
Appendix Brvp900 Packaging

351
- RVP900 Processor Components
  
  351
- Safety
  
  351
- Main Computer
  
  352
- IFDR Module
  
  352
  - Generic I/O Interconnect Breakout Cable
    354
- Optional DAFC
  
  355
- Optional TDWR Custom Back Panel
  
  356
Appendix C Installation and Test Procedures

363
- Overview
  
  363
  - Test Checklist
    365
- Installation Check
  
  366
- Power up Check
  
  367
- Setup Terminal
  
  368
- Setup "V" Command (Internal Status)
  
  369
- Setup "MC" Command (Board Configuration)
  
  370
- Setup "Mp" Command (Processing Options)
  
  371
- Setup "Mf" Command (Clutter Filters)
  
  372
- Setup "Mt" Command (General Trigger Setup)
  
  373
- Initial Setup of Information for each Pulse Width
  
  375
- Setup "Mb" Command (Burst Pulse and AFC)
  
  377
- Setup "M+" Command (Debug Options)
  
  379
- Setup "Mz" Command (Transmitter Phase Control)
  
  380
- Ascope Test
  
  381
- Burst Pulse Alignment
  
  382
- Bandwidth Filter Adjustment
  
  383
- Digital AFC (DAFC) Alignment (Optional)
  
  384
- MFC Functional Test and Tuning (Optional)
  
  386
- AFC Functional Test (Optional)
  
  387
- Input if Signal Level Check
  
  388
- Calibration and Dynamic Range Check
  
  389
- Receiver Bandwidth Check
  
  391
- Receiver Phase Noise Check
  
  393
- Hardcopy and Backup of Final Setups
  
  394
- RVP901 Txdac Stand-Alone Bench Test
  
  395
Appendix D Rvp900 Developer's Notes

397
- Organization of the RDA Software
  
  397
- RVP Overall Code Organization
  
  398
- Debugging and Profiling Your Code
  
  404
- Creating New Major Modes from Old Ones
  
  410
  - Function Pointers Are the Key to Customization
    412
- Real-Time Control of the RVP8
  
  413
- Customizing the (I,Q) Data Stream
  
  417
  - Defining the FIR Matched Filter
    417
  - Applying Raw Pulse Corrections
    417
  - Inserting Useriq Header Bits
    417
- Customizing the Front Panel Display
  
  417
- Adding Custom Dsp/Lib Opcodes
  
  417
- Using the Softplane for Physical I/O
  
  417
  - Softplane Programmer's Model
    417
  - Reducing Unnecessary PCI Traffic
    418
- Handling Live Antenna Angles
  
  418
- Creating Custom Trigger Sequences
  
  418
  - Defining Trigger Waveshapes
    418
  - Defining Trigger PRT Sequences
    418
  - Polarization and Phase Control
    418
  - Example: Adding PRT Micro-Stagger
    418
- Determining Cpi's and Ray Boundaries
  
  420
- Using the RVP Timeseries API
  
  420
  - Reader and Writer Clients
    420
  - Attach/Detach Details
    421
  - Extracting Pulses Via Sequence Numbers
    421
  - Using Memory Bandwidth Effectively
    421
- Using the Intel IPP Library
  
  422
Appendix Etime Series Recording

425
- Overview
  
  425
- TS Record/Playback Software Architecture
  
  426
  - General Architecture
    426
  - Description of Processes
    426
- Installation & Configuration
  
  428
- TS Switch Utility
  
  431
- TS Archive Utility
  
  432
  - Archive Directory Area
    433
  - TS Source
    433
  - Filter
    434
  - TS Archive Log Area
    436
- Specific Software Application Examples
  
  437
- Ascope Playback Features
  
  444
  - Archive on Local RVP900
    445
  - Archive on Separate Archive Host
    446
- TS Playback Using IRIS
  
  446
- TS Viewing Utility (Tsview)
  
  447
  - Overview
    447
  - Starting Tsview and Sample Session
    448
  - Tsview Command Line Options
    449
- TS Record Data Format
  
  451
Appendix Frcp902 Wsr98D Panel

455
- Overview
  
  455
- Safety Considerations
  
  455
  - ESD Protection
    455
- Regulatory Compliances
  
  456
  - DC Power Conditions for Use
    456
  - WEEE Compliance
    457
- Rohs Compliance
  
  457
  - China Rohs Compliance
    458
- RCP902 WSR98D Panel Architecture
  
  459
- Physical Interface
  
  460
  - Overall Size
    460
  - Mounting Dimensions
    460
  - Connector Locations
    460
  - Modifications on RCP902 WSR98D Panel
    461
- Electrical Interfaces
  
  461
  - J3 - Transmitter Triggers (Tx TRIGS)
    463
  - J4 - Receiver Protector (Rx PROT)
    464
  - J7 - RF Generator (RF-GEN)
    464
  - J8 - RF Test Selection (RF-TEST SEL)
    465
  - J9 - Attenuator Control (ATTEN)
    466
  - J10 - Noise Source (NOISE SRC)
    466
  - J11 - RF Test Switch (RF-TEST SW)
    467
  - J12 - DAU Serial I/O (SERIAL-IN)
    467
  - J14 - DCU Serial I/O (SERIAL-IN)
    468
  - Coax
    469
  - J26 - LOG Video Input (RF TEST-IN)
    469
  - J27 - Spare Analog Input (SPARE)
    469
  - J20, J21, J22, J23 - RVP901 Digital Test Points
    470
  - J18 - Panel Power Input (+28V POWER)
    470
- RVP900 Interface to the RCP902 WSR98D Panel
  
  470
  - RCP902 WSR98D I/O Interconnect Breakout
    471
- Software Control/Status
  
  473
  - Logical Variables
    473
  - Monitoring Analog Inputs
    476

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Vaisala RVP900 Receiver Signal Processor Manuals

Vaisala RVP900 User Manual (484 pages)

Table of Contents

1 About this Document

2 Product Overview

3 Functional Description

4 RVP Hardware

5 TTY Non-Volatile Setups

6 Plot-Assisted Setups

7 Processing Algorithms

8 Host Computer Commands

9 Technical Data

Appendix A: Installation and Test Procedures

Appendix B: RVP901 IFDR Technical Drawings

Appendix C: RVP900 Developer Notes

Appendix D: Time Series Recording

Appendix E: Serial Status Formats

Appendix F: Softplane.conf

Appendix G: RCP903 ASR9-WSP Panel

Vaisala RVP900 User Manual (512 pages)

Table of Contents

Chapter 1 General Information

About this Manual

Version Information

Related Manuals

Documentation Conventions

Safety

Regulatory Compliances

WEEE Compliance

Rohs Compliance

Trademarks

License Agreement

Warranty

Chapter 2 Introduction and Specifications

RVP900 Lineage

Dual Frequency Receive Options

Open Hardware and Software Design

Standard LAN Interconnection for Data Transfer or Parallel Processing

System Configuration Concepts

Rvp901 Ifdr

Analog Versus Digital Radar Receivers

RVP900 if Signal Processing

RVP900 Weather Signal Processing

RVP900 Control and Maintenance Features

Support Utilities and Application Software

System Network Architecture

Open Architecture and Published API

RVP901 Technical Specifications

Chapter 3 Hardware Installation

Overview and Input Power Requirements

RVP901 IFDR Installation

RVP902 Main Chassis

Digital AFC Module (DAFC)

IFDR DAFC Uplink Protocol

Chapter 4 Tty Nonvolatile Setups

Overview of Setup Procedures

View/Modify Dialogs

Chapter 5 Plot-Assisted Setups

P+ - Plot Test Pattern

General Conventions Within the Plot Commands

Pb - Plot Burst Pulse Timing

Ps - Plot Burst Spectra and AFC

Pr - Plot Receiver Waveforms

Pa - Plot Tx Waveform Ambiguity

Chapter 6 Processing Algorithms

IF Signal Processing

Time Series (I and Q) Signal Processing

Autocorrelation R(N) Processing

Thresholding

Reflectivity Calibration

Dual PRT Processing Mode

Dual PRF Velocity Unfolding

Random Phase Second Trip Processing

Signal Generator Testing of the Algorithms

Chapter 7 Host Computer Commands

No-Operation (NOP)

Load Range Mask (LRMSK)

Setup Operating Parameters (SOPRM)

Interface Input/Output Test (IOTEST)

Interface Output Test (OTEST)