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Texas Instruments LMK04808B Manuals
Manuals and User Guides for Texas Instruments LMK04808B. We have
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Texas Instruments LMK04808B manuals available for free PDF download: User Manual
Texas Instruments LMK04808B User Manual (84 pages)
LMK048 Series
Brand:
Texas Instruments
| Category:
Motherboard
| Size: 3.5 MB
Table of Contents
Table of Contents
3
Snau076B
3
General Description
5
Evaluation Board Kit Contents
5
Available Lmk048Xx Evaluation Boards
5
Available Lmk04800 Family Devices
5
Quick Start
6
Default Codeloader Modes for Evaluation Boards
7
Example: Using Codeloader to Program the Lmk04808B
8
1. Start Codeloader 4 Application
8
Select Device
8
Program /Load Device
8
Restoring a Default Mode
9
Visual Confirmation of Frequency Lock
10
Enable Clock Outputs
10
Pll Loop Filters and Loop Parameters
12
Pll 1 Loop Filter
12
122.88 Mhz VCXO PLL
12
Pll2 Loop Filter
13
Integrated VCO PLL
13
Evaluation Board Inputs and Outputs
14
Recommended Test Equipment
22
Programming 0-Delay Mode in Codeloader
23
Overview
23
Dual Loop 0-Delay Mode Examples
23
Programming Steps
23
Details
23
Single Loop 0-Delay Mode Examples
25
Programming Steps
25
Details
25
Appendix A: Codeloader Usage
27
Port Setup Tab
27
Clock Outputs Tab
28
Pll1 Tab
30
Setting the PLL1 VCO Frequency and PLL2 Reference Frequency
31
Pll2 Tab
32
Bits /Pins Tab
33
Registers Tab
38
Appendix B: Typical Phase Noise Performance Plots
39
Pll1
39
122.88 Mhz VCXO Phase Noise
39
Clock Output Measurement Technique
40
Buffered Oscout Phase Noise
40
Revised - August 2014
40
LMK04800 Family
40
Clock Outputs (Clkout)
41
LMK04808B Clkout Phase Noise
41
LMK04808B Oscout Phase Noise
43
LMK04806B Clkout Phase Noise
44
LMK04806B Oscout Phase Noise
46
LMK04803B Clkout Phase Noise
47
LMK04803B Oscout Phase Noise
49
Appendix C: Schematics
50
Power Supplies
50
Lmk048Xxb Device with Loop Filter and Crystal Circuits
51
Reference Inputs (Clk in 0 & Clk in 1), External Vcxo (Osc in ) & Vco Circuits , and Osc out 1 Output
52
Clock Outputs (Osc out 0, Clk out to Clk out 3)
53
Clock Outputs (Clkout4 to Clkout7)
54
Clock Outputs (Clkout8 to Clkout11)
55
Uwire Header, Logic I/O Ports and Status Leds
56
Usb Interface
57
Appendix D: Bill of Materials
58
Appendix E: Pcb Layers Stackup
68
Appendix F: Pcb Layout
69
Layer #1 - Top
69
Layer #2 - RF Ground Plane (Inverted)
70
Layer #3 - VCC Planes
71
Layer #4 - Ground Plane (Inverted)
72
Layer # 5 - VCC Planes 2
73
Layer #6 - Bottom
74
Layers #1 and 6 - Top and Bottom (Composite)
75
Appendix G: Evm Software and Communication: Interfacing Uwire
76
Appendix H: Troubleshooting Information
78
Confirm Communications
78
2) Confirm PLL1 Operation/Locking
78
3) Confirm PLL2 Operation/Locking
79
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Texas Instruments LMK04808B User Manual (84 pages)
Brand:
Texas Instruments
| Category:
Motherboard
| Size: 3.62 MB
Table of Contents
Table of Contents
3
Snau076B
3
General Description
5
Evaluation Board Kit Contents
5
Available Lmk048Xx Evaluation Boards
5
Available Lmk04800 Family Devices
5
Quick Start
6
Default Codeloader Modes for Evaluation Boards
7
Example: Using Codeloader to Program the Lmk04808B
8
1. Start Codeloader 4 Application
8
Select Device
8
Program /Load Device
8
Restoring a Default Mode
9
Visual Confirmation of Frequency Lock
10
Enable Clock Outputs
10
Pll Loop Filters and Loop Parameters
12
Pll 1 Loop Filter
12
122.88 Mhz VCXO PLL
12
Pll2 Loop Filter
13
Integrated VCO PLL
13
Evaluation Board Inputs and Outputs
14
Recommended Test Equipment
22
Programming 0-Delay Mode in Codeloader
23
Overview
23
Dual Loop 0-Delay Mode Examples
23
Programming Steps
23
Details
23
Single Loop 0-Delay Mode Examples
25
Programming Steps
25
Details
25
Appendix A: Codeloader Usage
27
Port Setup Tab
27
Clock Outputs Tab
28
Pll1 Tab
30
Setting the PLL1 VCO Frequency and PLL2 Reference Frequency
31
Pll2 Tab
32
Bits /Pins Tab
33
Registers Tab
38
Appendix B: Typical Phase Noise Performance Plots
39
Pll1
39
122.88 Mhz VCXO Phase Noise
39
Clock Output Measurement Technique
40
Buffered Oscout Phase Noise
40
Revised - August 2014
40
LMK04800 Family
40
Clock Outputs (Clkout)
41
LMK04808B Clkout Phase Noise
41
LMK04808B Oscout Phase Noise
43
LMK04806B Clkout Phase Noise
44
LMK04806B Oscout Phase Noise
46
LMK04803B Clkout Phase Noise
47
LMK04803B Oscout Phase Noise
49
Appendix C: Schematics
50
Power Supplies
50
Lmk048Xxb Device with Loop Filter and Crystal Circuits
51
Reference Inputs (Clk in 0 & Clk in 1), External Vcxo (Osc in ) & Vco Circuits , and Osc out 1 Output
52
Clock Outputs (Osc out 0, Clk out to Clk out 3)
53
Clock Outputs (Clkout4 to Clkout7)
54
Clock Outputs (Clkout8 to Clkout11)
55
Uwire Header, Logic I/O Ports and Status Leds
56
Usb Interface
57
Appendix D: Bill of Materials
58
Appendix E: Pcb Layers Stackup
68
Appendix F: Pcb Layout
69
Layer #1 - Top
69
Layer #2 - RF Ground Plane (Inverted)
70
Layer #3 - VCC Planes
71
Layer #4 - Ground Plane (Inverted)
72
Layer # 5 - VCC Planes 2
73
Layer #6 - Bottom
74
Layers #1 and 6 - Top and Bottom (Composite)
75
Appendix G: Evm Software and Communication: Interfacing Uwire
76
Appendix H: Troubleshooting Information
78
Confirm Communications
78
2) Confirm PLL1 Operation/Locking
78
3) Confirm PLL2 Operation/Locking
79
Texas Instruments LMK04808B User Manual (84 pages)
LMK048 Series
Brand:
Texas Instruments
| Category:
Motherboard
| Size: 3.42 MB
Table of Contents
Table of Contents
3
General Description
5
Evaluation Board Kit Contents
5
Available Lmk048Xx Evaluation Boards
5
Available Lmk04800 Family Devices
5
Quick Start
6
Default Codeloader Modes for Evaluation Boards
7
Example: Using Codeloader to Program the Lmk04808B
8
Start Codeloader 4 Application
8
Select Device
8
Program /Load Device
8
Restoring a Default Mode
9
Visual Confirmation of Frequency Lock
10
Enable Clock Outputs
10
Pll Loop Filters and Loop Parameters
12
Pll 1 Loop Filter
12
122.88 Mhz VCXO PLL
12
Pll2 Loop Filter
13
Integrated VCO PLL
13
Evaluation Board Inputs and Outputs
14
Recommended Test Equipment
22
Programming 0-Delay Mode in Codeloader
23
Overview
23
Dual Loop 0-Delay Mode Examples
23
Programming Steps
23
Details
23
Single Loop 0-Delay Mode Examples
25
Programming Steps
25
Details
25
Appendix A: Codeloader Usage
27
Port Setup Tab
27
Clock Outputs Tab
28
Pll1 Tab
30
Setting the PLL1 VCO Frequency and PLL2 Reference Frequency
31
Pll2 Tab
32
Bits/Pins Tab
33
Registers Tab
38
Appendix B: Typical Phase Noise Performance Plots
39
Pll1
39
122.88 Mhz VCXO Phase Noise
39
Clock Output Measurement Technique
40
Buffered Oscout Phase Noise
40
Clock Outputs (Clkout)
41
LMK04808B Clkout Phase Noise
41
LMK04808B Oscout Phase Noise
43
LMK04806B Clkout Phase Noise
44
LMK04806B Oscout Phase Noise
46
LMK04803B Clkout Phase Noise
47
LMK04803B Oscout Phase Noise
49
Appendix C: Schematics
50
Power Supplies
50
Lmk048Xxb Device with Loop Filter and Crystal Circuits
51
Reference Inputs (Clk in 0 & Clk in 1), External Vcxo (Osc in ) & Vco Circuits , and Osc out 1 Output
52
Clock Outputs (Osc out 0, Clk out to Clk out 3)
53
Clock Outputs (Clkout4 to Clkout7)
54
Clock Outputs (Clkout8 to Clkout11)
55
Uwire Header, Logic I/O Ports and Status Leds
56
Usb Interface
57
Appendix D: Bill of Materials
58
Appendix E: Pcb Layers Stackup
68
Appendix F: Pcb Layout
69
Layer #1 - Top
69
Layer #2 - RF Ground Plane (Inverted)
70
Layer #3 - VCC Planes
71
Layer #4 - Ground Plane (Inverted)
72
Layer # 5 - VCC Planes 2
73
Layer #6 - Bottom
74
Layers #1 and 6 - Top and Bottom (Composite)
75
Appendix G: Evm Software and Communication: Interfacing Uwire
76
Appendix H: Troubleshooting Information
78
Confirm Communications
78
Confirm PLL1 Operation/Locking
78
Confirm PLL2 Operation/Locking
79
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