User Manuals: Tews Technologies TMPE627 FPGA

Manuals and User Guides for Tews Technologies TMPE627 FPGA. We have 1 Tews Technologies TMPE627 FPGA manual available for free PDF download: User Manual

Tews Technologies TMPE627 User Manual

Tews Technologies TMPE627 User Manual (34 pages)

Reconfigurable FPGA with AD/DA & Digital I/O PCIe Mini Card

Brand: Tews Technologies | Category: Computer Hardware | Size: 0 MB

Table of Contents

Table of Contents
4
Product Description
6
Figure 1-1: Block Diagram
6
Technical Specification
7
Table 2-1: Technical Specification
7
Handling and Operating Instructions
8
ESD Protection
8
Height Restrictions
8
Thermal Considerations
8
Functional Description
9
User FPGA Overview
9
Table 4-1: Tmpe627 Fpga Feature Overview
9
Table 4-2: Fpga Bank Usage
9
User FPGA Gigabit Transceiver (GTP)
10
User FPGA Configuration
10
SPI-Flash
10
Table 4-3: Gtp Connections
10
Table 4-4: Gigabit Transceiver Reference Clocks
10
Configuration Via JTAG
11
Generate Artix-7 Configuration Data
11
Clocking
11
FPGA Clock Sources
11
Table 4-5: Fpga Spi-Flash Connections
11
Table 4-6: Available Fpga Clocks
11
Digital I/O Interface
12
TTL I/O Interface
13
Figure 4-1: Ttl I/O Interface
13
Table 4-7: Digital I/O Interface
13
User GPIO
14
Table 4-8: I/O Pull Options
14
Table 4-9: I/O Pull Configuration
14
ADC Interface
15
Table 4-10: Fpga General Purpose I/O
15
Table 4-11: Adc I/O Interface
15
Table 4-12: Adc Fault Flag
15
Adc
16
Figure 4-2: Adc Input Circuit
16
Table 4-13: Adc Electrical Interface
16
Table 4-14: Adc Input Schemes
17
Table 4-15: Adc Input Schemes
17
DAC Interface
18
Dac
18
DAC Overcurrent Protection
18
Table 4-16: Dac I/O Interface
18
Table 4-17: Dac Electrical Interface
18
I²C-Eeprom
19
I²C Temperature Sensor
19
Table 4-18: Fpga I²C-Eeprom Connections
19
Table 4-19: Fpga I²C Temperature Sensor Connections
19
Thermal Management
20
ADC & DAC Correction
21
Off-Module Correction
21
Figure 4-3: Correction Formula
21
Correction EEPROM
22
Table 4-20: Correction Value Space Address Map
25
Design Help
26
Example Design
26
FPGA Multiboot
26
Installation
26
A Remark about Slot Supplies
26
O Connectors
27
Overview
27
Figure 7-1: I/O Connector Overview
27
Board Connectors
28
System Connector (X1)
28
Figure 7-2: Preliminary System Connector Pin Assignment
28
I/O Connector (X2)
29
Figure 7-3: I/O Connector Pin Assignment
29
JTAG Connector (X3)
30
Figure 7-4: Xrs Connector Pin Assignment
30
Figure 7-5: Tmpe627 Connected to a Programmer Via Ta308
30

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