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Monaco Quad 'C6x VME64
Spectrum Monaco Quad 'C6x VME64 Manuals
Manuals and User Guides for Spectrum Monaco Quad 'C6x VME64. We have
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Spectrum Monaco Quad 'C6x VME64 manual available for free PDF download: Technical Reference Manual
Spectrum Monaco Quad 'C6x VME64 Technical Reference Manual (92 pages)
Spectrum Brands, Inc. Board Technical Reference
Brand:
Spectrum
| Category:
Computer Hardware
| Size: 0.31 MB
Table of Contents
Table of Contents
5
1 Introduction
13
Features
13
Interfaces
14
Vme
14
Pmc
14
Pem
14
Serial Ports
14
Jtag
14
Reference Documents
15
General Bus Architecture
16
On-Board Power Supply
16
Figure 1 Block Diagram
16
Reset Conditions
17
Vme Sysreset
17
VME A24 Slave Interface Reset
17
JTAG Reset
17
Table 1 Reset Summary
17
Board Layout
18
Figure 2 Board Layout
18
Jumper Settings
19
Table 2 Jumper Settings
19
2 Processor Nodes
21
Table 3 Processor Configurations
21
Figure 3 Processor Node Block Diagram
22
Processor Memory Configuration
23
Internal Memory
23
External Memory
23
Table 4 'C6X Internal Peripheral Register Values
24
Figure 4 DSP Memory Map
25
Figure 5 DSP Memory Map for External-Memory Space CE1
26
Host Port
27
Interrupt Lines
27
Processor Expansion Module
27
Synchronous Burst SRAM
27
Synchronous DRAM
27
Processor Booting
28
Table 5 Processor Boot Source Jumpers
28
Figure 6 Serial Port Routing
29
Serial Port Routing
29
Table 6 PEM Connections for Serial Port 0 and 1
30
Table 7 VME and PMC Connections for Serial Port 1
30
3 Global Shared Bus
31
Memory
31
Arbitration
31
Table 8 Global Shared Bus Access
31
Burst Cycle Bus Access
32
Figure 7 Global Bus Arbitration
32
Single Cycle Bus Access
32
Locked Cycles
33
4 VME64 Bus Interface
35
VME Operation
35
SCV64 Primary Slave A32/A24 Interface
35
A24 Secondary Slave Interface
36
Figure 8 Primary VME A24/A32 Memory Map
36
Figure 9 A24 Secondary Interface Memory Map
37
Table 9 HPI Register Addresses
38
Master A32/A24/A16 SCV64 Interface
39
5 DSP~LINK3 Interface
41
DSP~LINK3 Data Transfer Operating Modes
41
Address Strobe Control Mode
42
Table 10 DSP~LINK3 Data Transfer Operating Modes
42
Interface Signals
43
DSP~LINK3 Reset
43
6 PCI Interface
45
Hurricane Configuration
45
Figure 10 PCI Memory Map
45
Table 11 Hurricane Register Set
46
Hurricane Implementation
48
7 JTAG Debugging
49
Figure 11 JTAG Chain
49
8 Interrupt Handling
51
Overview
51
DSP~LINK3 Interrupts to Node a
52
Figure 12 Interrupt Routing
52
PEM Interrupts
53
PCI Bus Interrupts
53
Hurricane Interrupt
53
SCV64 Interrupt
53
Table 12 KIPL Status Bits and the IACK Cycle
54
Bus Error Interrupts
55
Inter-Processor Interrupts
56
VME Host Interrupts to any Node
56
9 Registers
57
Table 13 Register Address Summary
57
VPAGE Register
58
VSTATUS Register
59
VINTA Register
61
VINTB Register
62
VINTC Register
63
VINTD Register
64
KIPL Enable Register
65
DSP~LINK3 Register
66
ID Register
67
VME A24 Status Register
68
Part Number
69
VME A24 Control Register
69
10 Specifications
71
Board Identification
71
General
72
Table 14 Specifications
72
Performance and Data Throughput
73
Table 15 Data Access/Transfer Performance
73
11 Connector Pinouts
75
Figure 13 Connector Layout
75
Part Number
75
Table 16 VME P1 Connector Pinout
76
VME Connectors
76
Table 17 VME P2 Connector Pinout (PMC to VME P2)
77
Table 18 VME P2 Connector (DSP~LINK3 to VME P2)
78
PMC Connectors
79
Table 19 PMC Connector JN1 Pinout
79
Table 20 PMC Connector JN2
80
Table 21 PMC Connector JN4
81
Table 22 Non-Standard PMC Connector JN5
82
PEM Connectors
83
Table 23 PEM 1 Connector Pinout
83
Table 24 PEM 2 Connector Pinout
84
JTAG Connectors
85
Table 25 JTAG in Connector Pinout
85
Table 26 JTAG out Connector
85
Part Number
87
Table 27 SCV64 Register Initialization
87
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