Rohm LAPIS Semiconductor ML620Q157B Manuals

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Rohm LAPIS Semiconductor ML620Q157B User Manual (558 pages)

Brand: Rohm | Category: Microcontrollers | Size: 10 MB

Table of Contents
5
Chapter 1 Overview

16
- Features
  17
- Configuration of Functional Blocks
  20
  - Block Diagram
    20
- Pins
  23
  - Pin Layout
    23
    
    Pin Layout of Package
    23
  - List of Pins
    26
  - Pin Description
    30
  - Handling of Unused Pins
    33
Chapter 2 CPU and Memory Space

34
- Genral Description
  35
- Program Memory Space
  35
- Data Memory Space
  38
- Instruction Length
  41
- Data Type
  41
- Description of Registers
  41
  - List of Registers
    41
  - Data Segment Register (DSR)
    41
Chapter 3 Reset Function

42
- General Description
  43
  - Features
    43
  - Configuration
    43
  - List of Pin
    43
- Description of Registers
  44
  - List of Registers
    44
  - Reset Status Register (RSTAT)
    44
- Description of Operation
  46
  - Operation of System Reset Mode
    46
Chapter 4 MCU Control Function

47
- General Description
  48
  - Features
    48
  - Configuration
    48
- Description of Registers
  49
- Description of Operation
  58
Chapter 5 Interrupts (Ints)

69
Chapter 6 Clock Generation Circuit

118
- Features
  119
- Configuration
  120
- List of Pins
  121
- Clock Configuration Diagram
  121
- Description of Registers
  122
  - List of Registers
    122
  - Frequency Control Register 0(FCON0)
    123
  - Frequency Control Register 1 (FCON1)
    124
  - Frequency Control Register 3(FCON3)
    125
  - Frequency Status Register (FSTAT)
    127
- Description of Operation
  128
  - Low-Speed Clock
    128
    
    Low-Speed Crystal Oscillation Circuit
    128
    
    Low-Speed Built-In RC Oscillation Circuit
    128
    
    Operation of Low-Speed Clock Generation Circuit
    129
  - High-Speed Clock
    132
    
    High-Speed Built-In RC Oscillation Circuit
    132
    
    PLL Oscillation Circuit
    132
    
    Operation of High-Speed Clock
    133
  - Switching of System Clock
    135
- Specifying Port Registers
  136
Chapter 7 Time Base Counter

139
Chapter 8 8Bit Timer

148
- Features
  149
- Configuration
  149
- Description of Registers
  150
  - List of Registers
    150
  - Timer 0 Data Register (TM0D)
    151
  - Timer 1 Data Register (TM1D)
    152
  - Timer 0 Counter Register (TM0C)
    153
  - Timer 1 Counter Register (TM1C)
    154
  - Timer 0 Control Register (TM0CON)
    155
  - Timer 1 Control Register (TM1CON)
    157
  - Timer Start Register 0 (TMSTR0)
    158
  - Timer Stop Register 0 (TMSTP0)
    159
  - Timer Status Register 0 (TMSTAT0)
    160
- Description of Operation
  161
Chapter 9 16Bit Timer

163
Chapter 10 Watchdog Timer

183
- General Description
  184
  - Features
    184
  - Configuration
    184
- Description of Registers
  185
- Description of Operation
  188
Chapter 11 PWM

191
- General Description
  192
  - Features
    192
  - Configuration
    193
  - List of Pins
    197
- Description of Registers
  198
- Description of Operation
  246
  - PWM Single Mode / Continuous Mode
    248
  - PWM Single Mode / One Shot Mode
    250
  - PWM Coupled Mode / Continuous Mode
    252
    
    With no Dead-Time Specified
    252
    
    With Dead-Time Specified
    254
  - PWM Coupled Mode / One Shot Mode
    256
    
    With no Dead-Time Specified
    256
    
    With Dead-Time Specified
    258
  - PWM Control by the Software
    260
    
    Start/Stop/Clear Operation
    260
    
    Period and Duty Update
    260
  - PWM Control by the External Input
    261
    
    Start/Stop/Clear Operation
    261
    
    Period and Duty Update
    262
  - PWM Control Mode
    263
    
    Software Start Mode
    263
    
    Software Start Mode or External Start Mode
    263
    
    External Input Start Mode
    265
    
    Software Start or External Input Clear Mode
    267
  - PWM Emergency Stop Operation
    270
- Specifying Port Registers
  272
Chapter 12 Synchronous Serial Port (SSIO)

277
Chapter 13 UART

289
Chapter 14 I C Bus Interface

330
- Features
  331
- Configuration
  331
- List of Pins
  332
- Description of Registers
  333
- Description of Operation
  341
  - Communication Operating Mode
    341
    
    Start Condition
    341
    
    Restart Condition
    341
    
    Slave Address Transmit Mode
    341
    
    Data Transmit Mode
    341
    
    Data Receive Mode
    341
    
    Control Register Setting Wait State
    341
    
    Stop Condition
    341
  - Communication Operation Timing
    342
  - Operation Waveforms
    344
- Specifying Port Registers
  345
Chapter 15 Port 0

347
- Features
  347
- Configuration
  347
- List of Pins
  348
- Description of Registers
  349
  - List of Registers
    349
  - Port 0 Data Register (P0D)
    350
  - Port 0 Control Registers 0, 1 (P0CON0, P0CON1)
    351
- Description of Operation
  352
  - Input Port Function
    352
Chapter 16

354
- Features
  354
- Configuration
  354
- List of Pins
  355
- Description of Registers
  356
  - List of Registers
    356
  - Port 1 Data Register (P1D)
    357
  - Port 1 Direction Register (P1DIR)
    358
  - Port 1 Control Registers 0,1 (P1CON0, P1CON1)
    359
- Description of Operation
  361
  - Input Port Function
    361
  - Input/Output Port Function
    361
  - Secondary Function
    361
Chapter 17 Port2

363
- Features
  363
- Configuration
  363
- List of Pins
  364
- Description of Registers
  365
- Description of Operation
  371
  - Output Port Function
    371
  - Secondary, Tertiary, and Quaternary Functions
    371
Chapter 18

374
- Port3
  374
  - Configuration
    374
  - List of Pins
    375
  - Description of Registers
    376
    
    List of Registers
    376
    
    Port 3 Data Register (P3D)
    377
    
    Port 3 Direction Register (P3DIR)
    379
    
    Port 3 Control Registers 0, 1 (P3CON0, P3CON1)
    380
    
    Port 3 Mode Registers 0, 1 (P3MOD0, P3MOD1)
    382
  - Description of Operation
    384
    
    Input/Output Port Functions
    384
    
    Secondary and Tertiary Functions
    384
Chapter 19 Port4

386
- Features
  386
- Configuration
  386
- List of Pins
  387
- Description of Registers
  388
- Description of Operation
  396
  - Input/Output Port Functions
    396
  - Secondary, Tertiary, and Quaternary Functions
    396
Chapter 20 Port5

398
- Features
  398
- Configuration
  398
- List of Pins
  399
- Description of Registers
  400
- Description of Operation
  408
  - Input/Output Port Functions
    408
  - Secondary, Tertiary, and Quaternary Functions
    408
Chapter 21 Port6

410
- Features
  410
- Configuration
  410
- List of Pins
  411
- Description of Registers
  412
- Description of Operation
  420
  - Input/Output Port Functions
    420
  - Secondary, Tertiary, and Quaternary Functions
    420
Chapter 22 Port7

422
- Features
  422
- Configuration
  422
- List of Pins
  423
- Description of Registers
  424
  - List of Registers
    424
  - Port 7 Data Register (P7D)
    425
  - Port 7 Direction Register (P7DIR)
    426
  - Port 7 Mode Registers 0, 1 (P7MOD0, P7MOD1)
    429
- Description of Operation
  431
  - Input/Output Port Functions
    431
  - Secondary, Tertiary, and Quaternary Functions
    431
Chapter 23 Port8

433
- Features
  433
- Configuration
  433
- List of Pins
  434
- Description of Registers
  435
- Description of Operation
  443
  - Input/Output Port Functions
    443
  - Secondary and Tertiary Functions
    443
Chapter 24 Successive Approximation Type A/D Converter (SA-ADC)

445
- Features
  445
- Configuration
  445
- Description of Registers
  447
  - List of Registers
    447
  - SA-ADC Result Register 0L (SADR0L)
    448
  - SA-ADC Result Register 0H (SADR0H)
    448
  - SA-ADC Result Register 1L (SADR1L)
    449
  - SA-ADC Result Register 1H (SADR1H)
    449
  - SA-ADC Result Register 2L (SADR2L)
    450
  - SA-ADC Result Register 2H (SADR2H)
    450
  - SA-ADC Result Register 3L (SADR3L)
    451
  - SA-ADC Result Register 3H (SADR3H)
    451
  - SA-ADC Result Register 4L (SADR4L)
    452
  - SA-ADC Result Register 4H (SADR4H)
    452
  - SA-ADC Result Register 5L (SADR5L)
    453
  - SA-ADC Result Register 5H (SADR5H)
    453
  - SA-ADC Result Register 6L (SADR6L)
    454
  - SA-ADC Result Register 6H (SADR6H)
    454
  - SA-ADC Result Register 7L (SADR7L)
    455
  - SA-ADC Result Register 7H (SADR7H)
    455
  - SA-ADC Result Register 8L (SADR8L)
    456
  - SA-ADC Result Register 8H (SADR8H)
    456
  - SA-ADC Result Register 9L (SADR9L)
    457
  - SA-ADC Result Register 9H (SADR9H)
    457
  - SA-ADC Result Register al (SADRAL)
    458
  - SA-ADC Result Register AH (SADRAH)
    458
  - SA-ADC Result Register BL (SADRBL)
    459
  - SA-ADC Result Register BH (SADRBH)
    459
  - SA-ADC Control Register 0 (SADCON0)
    460
  - SA-ADC Control Register 1 (SADCON1)
    461
  - SA-ADC Mode Register 0 (SADMOD0)
    462
  - SA-ADC Mode Register 1 (SADMOD1)
    464
- Description of Operation
  465
  - Operation of the Successive Approximation Type A/D Converter
    466
Chapter 25 General Description

468
- Features
  468
- Configuration
  468
- List of Pins
  468
- Description of Registers
  469
- Description of Operation
  472
  - Comparator Functions
    472
  - Interrupt Request
    473
Chapter 26 LLD (Low Level Detector)

474
- General Description
  475
  - Features
    475
  - Configuration
    475
- Description of Registers
  476
  - List of Registers
    476
  - LLD Circuit Control Register 1 (LLDCON1)
    477
- Description of Operation
  478
  - Threshold Voltage
    478
  - Operation of LLD Circuit
    478
Chapter 27 Power Supply Circuit

480
- Features
  481
- Configuration
  481
- List of Pins
  481
- Description of Operation
  482
Chapter 28 On-Chip Debug Function

483
- How to Connect the On-Chip Debug Emulator
  484
- Flash Memory Rewrite Function
  486
  - Features
    487
  - Description of Registers
    488
    
    List of Registers
    488
    
    Flash Control Register (FLASHCON)
    494
    
    Flash Acceptor (FLASHACP)
    495
    
    Flash Segment Register (FLASHSEG)
    495
    
    Flash Self Register (FLASHSLF)
    496
    
    Flash Remap Register (REMAPADD)
    497
  - Description of Operation
    498
    
    Block Erase Function
    500
    
    Sector Erase Function
    502
    
    1-Word Write Function
    504
    
    Boot Area Remap Function by Software
    506
    
    Notes in Use
    507
Chapter 30 Code-Option

509
- Features
  509
- Description of Registers
  509
  - List of Registers
    509
  - Code-Option Register 0 (CODEOP0)
    510
- The Setting Method of the Code-Option Data
  511
  - Code-Option Data Format
    511
  - Code-Option Programming Method
    511
Chapter 31 External Interrupt Control Circuit

512
- Features
  513
- Configuration
  513
- List of Pins
  514
- Description of Registers
  515
- Description of Operation
  519
  - External Interrupt
    519
  - Interrupt Request
    519
- Appendix A Contents of Registers
  
  522
- Appendix B Package Dimensions
  
  530
- Appendix C Electrical Characteristics
  
  537
- Appendix D Application Circuit Example
  
  548
- Appendix E Check List
  
  550
  - Revision History
    554

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Rohm LAPIS Semiconductor ML620Q157B Manuals

Rohm LAPIS Semiconductor ML620Q157B User Manual (558 pages)

Table of Contents

Chapter 1 Overview

Chapter 2 CPU and Memory Space

Chapter 3 Reset Function

Chapter 4 MCU Control Function

Chapter 5 Interrupts (Ints)

Chapter 6 Clock Generation Circuit

Chapter 7 Time Base Counter

Chapter 8 8Bit Timer

Chapter 9 16Bit Timer

Chapter 10 Watchdog Timer

Chapter 11 PWM

Chapter 12 Synchronous Serial Port (SSIO)

Chapter 13 UART

Chapter 14 I C Bus Interface

Chapter 15 Port 0

Chapter 16

Chapter 17 Port2

Chapter 18

Chapter 19 Port4

Chapter 20 Port5

Chapter 21 Port6

Chapter 22 Port7

Chapter 23 Port8

Chapter 24 Successive Approximation Type A/D Converter (SA-ADC)

Chapter 25 General Description

Chapter 26 LLD (Low Level Detector)

Chapter 27 Power Supply Circuit

Chapter 28 On-Chip Debug Function

Chapter 30 Code-Option

Chapter 31 External Interrupt Control Circuit

Appendix A Contents of Registers

Appendix B Package Dimensions

Appendix C Electrical Characteristics

Appendix D Application Circuit Example

Appendix E Check List

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