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Renesas V850ES/JC3-L User Manual (958 pages)

Brand: Renesas | Category: Microcontrollers | Size: 6 MB

Table of Contents
8
Chapter 1 Introduction

19
- General
  19
- Features
  23
- Application Fields
  25
- Ordering Information
  25
- V850Es/Jc3-L
  25
- V850Es/Je3-L
  25
- Pin Configuration (Top View)
  26
- Function Block Configuration
  31
- Internal Block Diagram
  31
- Internal Units
  34
Chapter 2 Pin Functions

37
Chapter 3 Cpu Function

50
- Features
  50
- CPU Register Set
  51
- Program Register Set
  52
- System Register Set
  53
- Operation Modes
  59
- Address Space
  60
- CPU Address Space
  60
- Memory Map
  61
- Areas
  63
- Wraparound of Data Space
  68
- Recommended Use of Address Space
  68
- Peripheral I/O Registers
  72
- Special Registers
  82
- Registers to be Set First
  86
- Cautions
  87
Chapter 4 Port Functions

89
- Features
  89
- V850ES/JC3-L (40-Pin)
  89
- V850ES/JC3-L (48-Pin)
  89
- V850Es/Je3-L
  89
- Basic Port Configuration
  90
- V850ES/JC3-L (40-Pin)
  90
- V850ES/JC3-L (48-Pin)
  91
- V850Es/Je3-L
  92
- Port Configuration
  93
- Port 0
  99
- Port 1 (V850ES/JC3-L (48-Pin), V850ES/JE3-L)
  105
- Port 3
  106
- Port 4
  114
- Port 5
  116
- Port 7
  121
- Port 9
  124
- Port CM
  136
- Port DL
  137
- Block Diagrams
  139
- Port Register Settings When Alternate Function Is Used
  171
- Cautions
  177
- Cautions on Setting Port Pins
  177
- Cautions on Bit Manipulation Instruction for Port N Register (Pn)
  180
- Cautions on On-Chip Debug Pins
  181
- Cautions on P05/INTP2/DRST Pin
  181
- Cautions on P10, P11, and P53 Pins When Power Is Turned on
  181
- Hysteresis Characteristics
  181
Chapter 5 Clock Generator

182
- Overview
  182
- Configuration
  183
- Registers
  185
- Operations
  190
- Operation of each Clock
  190
- External Clock Signal Input
  190
- PLL Function
  191
- Overview
  191
- Registers
  191
- Usage
  195
- How to Connect a Resonator
  196
- Main Clock Oscillator
  196
- Subclock Oscillator
  196
Chapter 6 16-Bit Timer/Event Counter P (Tmp)

199
- Overview
  199
- Configuration
  200
- Pins Used by Tmpn
  202
- Register Configuraiton
  203
- Interrupts
  206
- Registers
  207
- Operations
  219
- Interval Timer Mode (Tpnmd2 to Tpnmd0 Bits = 000)
  227
- External Event Count Mode (Tpnmd2 to Tpnmd0 Bits = 001)
  238
- External Trigger Pulse Output Mode (Tpnmd2 to Tpnmd0 Bits = 010)
  247
- One-Shot Pulse Output Mode (Tpnmd2 to Tpnmd0 Bits = 011)
  259
- PWM Output Mode (Tpnmd2 to Tpnmd0 Bits = 100)
  267
- Free-Running Timer Mode (Tpnmd2 to Tpnmd0 Bits = 101)
  276
- Pulse Width Measurement Mode (Tpnmd2 to Tpnmd0 Bits = 110)
  292
- Timer Output Operations
  296
- Selector (V850ES/JE3-L Only)
  297
- Cautions
  298
Chapter 7 16-Bit Timer/Event Counter Q (Tmq)

299
- Functions
  299
- Configuration
  300
- Pins Used by TMQ0
  302
- Interrupts
  302
- Registers
  303
- Operations
  318
- Interval Timer Mode (TQ0MD2 to TQ0MD0 Bits = 000)
  325
- External Event Count Mode (TQ0MD2 to TQ0MD0 Bits = 001)
  336
- External Trigger Pulse Output Mode (TQ0MD2 to TQ0MD0 Bits = 010)
  347
- One-Shot Pulse Output Mode (TQ0MD2 to TQ0MD0 Bits = 011)
  362
- PWM Output Mode (TQ0MD2 to TQ0MD0 Bits = 100)
  372
- Free-Running Timer Mode (TQ0MD2 to TQ0MD0 Bits = 101)
  383
- Pulse Width Measurement Mode (TQ0MD2 to TQ0MD0 Bits = 110)
  403
- Timer Output Operations
  408
- Cautions
  409
Chapter 8 16-Bit Interval Timer M (Tmm)

410
- Features
  410
- Configuration
  411
- Registers
  412
- Operation
  414
- Interval Timer Mode
  414
- Cautions
  418
Chapter 9 Watch Timer

419
- Functions
  419
- Configuration
  420
- Control Registers
  422
- Operation
  426
- Watch Timer Operations
  426
- Interval Timer Operations
  427
- Cautions
  429
Chapter 10 Real-Time Counter

430
Chapter 11 Watchdog Timer 2

461
- Functions
  461
- Configuration
  462
- Registers
  463
- Operation
  465
Chapter 12 Real-Time Output Function (Rto)

466
- Function
  466
- Configuration
  467
- Registers
  469
- Operation
  471
- Usage
  472
- Cautions
  472
Chapter 13 A/D Converter

473
- Overview
  473
- Functions
  473
- Configuration
  474
- Registers
  477
- Operation
  488
- Basic Operation
  488
- Conversion Timing
  489
- Trigger Modes
  490
- Operation Mode
  492
- Power-Fail Compare Mode
  498
- Cautions
  505
- How to Read A/D Converter Characteristics Table
  510
CHAPTER 14 D/A CONVERTER (V850ES/JC3-L (48-Pin), V850ES/JE3-L)

514
- Functions
  514
- Configuration
  515
- Registers
  516
- Operation
  518
- Operation in Normal Mode
  518
- Operation in Real-Time Output Mode
  518
- Cautions
  519
Chapter 15 Asynchronous Serial Interface a (Uarta)

520
- Features
  520
- Configuration
  521
- Pin Functions of each Channel
  523
- Mode Switching of UARTA and Other Serial Interfaces
  524
- UARTA0 and CSIB4 Mode Switching
  524
- UARTA1 and I C02 Mode Switching
  525
- UARTA2 and I C00 Mode Switching
  526
- Registers
  527
- Interrupt Request Signals
  534
- Operation
  535
- Data Format
  535
- UART Transmission
  537
- Continuous Transmission Procedure
  538
- UART Reception
  540
- Reception Errors
  542
- Parity Types and Operations
  544
- LIN Transmission/Reception Format
  545
- SBF Transmission
  547
- SBF Reception
  548
- Receive Data Noise Filter
  549
- Dedicated Baud Rate Generator
  550
- Cautions
  558
Chapter 16 Clocked Serial Interface B (Csib)

559
Chapter 17 I C Bus

611
- Mode Switching of I
  612
- C Bus and Other Serial Interfaces
  612
- UARTA2 and I 2 C00 Mode Switching
  612
- CSIB0 and I 2 C01 Mode Switching
  613
- UARTA1 and I 2 C02 Mode Switching
  614
- Features
  615
- Configuration
  616
- Registers
  620
- Pin Configuration
  636
- I C Bus Definitions and Control Methods
  637
- Start Condition
  637
- Addresses
  638
- Transfer Direction Specification
  639
- Ack
  640
- Stop Condition
  641
- Wait State
  642
- Wait State Cancellation Method
  644
- I C Interrupt Request Signals (Intiicn)
  645
- Master Device Operation
  645
- Slave Device Operation (When Receiving Slave Address Data (Address Match))
  648
- Slave Device Operation (When Receiving Extension Code)
  652
- Operation Without Communication
  656
- Operation When Arbitration Loss Occurs (Operation as Slave after Arbitration Loss)
  656
- Operation When Arbitration Loss Occurs (no Communication after Arbitration Loss)
  658
- Interrupt Request Signal (Intiicn) Generation Timing and Wait Control
  665
- Address Match Detection Method
  667
- Error Detection
  667
- Extension Code
  667
- Arbitration
  668
- Wakeup Function
  669
- Communication Reservation
  670
- When Communication Reservation Function Is Enabled (Iicfn.iicrsvn Bit = 0)
  670
- When Communication Reservation Function Is Disabled (Iicfn.iicrsvn Bit = 1)
  674
- Cautions
  675
- Communication Operations
  676
- Master Operation in Single Master System
  677
- Master Operation in Multimaster System
  678
- Slave Operation
  681
- Timing of Data Communication
  684
Chapter 18 Dma Function (Dma Controller)

691
- Features
  691
- Configuration
  692
- Registers
  694
- Transfer Sources and Destinations
  702
- Transfer Modes
  702
- Transfer Types
  703
- DMA Channel Priorities
  704
- Time Related to DMA Transfer
  705
- DMA Transfer Start Factors
  706
- End of DMA Transfer
  707
- Cautions
  707
Chapter 19 Interrupt Servicing/Exception Processing Function

712
- Features
  712
- Non-Maskable Interrupts
  716
- Operation
  718
- Restoration
  719
- NP Flag
  720
- Maskable Interrupts
  721
- Operation
  721
- Restoration
  723
- Priorities of Maskable Interrupts
  724
- Interrupt Control Register (Xxicn)
  728
- Interrupt Mask Registers 0 to 3 (IMR0 to IMR3)
  730
- In-Service Priority Register (ISPR)
  732
- ID Flag
  733
- Watchdog Timer Mode Register 2 (WDTM2)
  733
- Software Exception
  734
- Operation
  734
- Restoration
  735
- EP Flag
  736
- Exception Trap
  737
- Illegal Opcode
  737
- Multiple Interrupt Servicing Control
  741
- External Interrupt Request Input Pins (NMI, INTP0 to INTP7)
  742
- Noise Elimination
  742
- Edge Detection
  742
- Interrupt Response Time of CPU
  748
- Periods in Which Interrupts Are Not Acknowledged by CPU
  749
- Cautions
  749
- Restored PC
  749
Chapter 20 Key Interrupt Function

750
- Function
  750
- Pin Functions
  751
- Registers
  751
- Cautions
  752
Chapter 21 Standby Function

753
- Overview
  753
- Registers
  755
- HALT Mode
  760
- Setting and Operation Status
  760
- Releasing HALT Mode
  760
- IDLE1 Mode
  762
- Setting and Operation Status
  762
- Releasing IDLE1 Mode
  763
- IDLE2 Mode
  765
- Setting and Operation Status
  765
- Releasing IDLE2 Mode
  766
- Securing Setup Time When Releasing IDLE2 Mode
  768
- STOP Mode/Low-Voltage STOP Mode
  769
- Setting and Operation Status
  769
- Releasing STOP Mode/Low-Voltage STOP Mode
  773
- Re-Setting after Release of Low-Voltage STOP Mode
  774
- Securing Oscillation Stabilization Time When Releasing STOP Mode
  775
- Subclock Operation Mode/Low-Voltage Subclock Operation Mode
  776
- Releasing Subclock Operation Mode
  780
- Sub-IDLE Mode/Low-Voltage Sub-IDLE Mode
  781
- Releasing Sub-IDLE Mode/Low-Voltage Sub-IDLE Mode
  784
Chapter 22 Reset Function

785
- Configuration
  786
- Register to Check Reset Source
  787
- Operation
  788
- Reset Operation by Watchdog Timer 2
  791
- Reset Operation by Low-Voltage Detector
  793
- Operation Immediately after Reset Ends
  794
- Reset Function Operation
  796
- Cautions
  797
Chapter 23 Clock Monitor

798
- Registers
  799
- Operation
  800
Chapter 24 Low-Voltage Detector (Lvi)

803
- Registers
  804
- Operation
  806
- To Use for Interrupt
  807
Chapter 25 Crc Function

808
- Registers
  809
- Operation
  810
- Usage
  811
Chapter 26 Regulator

813
- Operation
  815
Chapter 27 Option Byte

816
- Program Example
  817
Chapter 28 Flash Memory

818
- Memory Configuration
  819
- Functional Outline
  821
- Rewriting by Dedicated Flash Memory Programmer
  824
- Programming Environment
  824
- Communication Mode
  825
- Flash Memory Control
  827
- Selection of Communication Mode
  828
- Communication Commands
  829
- Pin Connection in On-Board Programming
  830
- Rewriting by Self Programming
  834
- Overview
  834
- Features
  835
- Standard Self Programming Flow
  836
- Flash Functions
  837
- Pin Processing
  837
- Internal Resources Used
  838
Chapter 29 On-Chip Debug Function

839
- Debugging with DCU
  841
- Connection Circuit Example
  841
- Interface Signals
  842
- Mask Function
  843
- Registers
  844
- Operation
  845
- Cautions
  846
- Debugging Without Using DCU
  847
- Circuit Connection Examples
  847
- Mask Function
  850
- Allocation of User Resources
  851
- Cautions
  858
- ROM Security Function
  859
- Security ID
  859
- Setting
  860
CHAPTER 30 ELECTRICAL SPECIFICATIONS (V850ES/JC3-L (40-Pin)) (Target)

861
- Absolute Maximum Ratings
  861
- Capacitance
  862
- Operating Conditions
  863
- Oscillator Characteristics
  864
- Main Clock Oscillator Characteristics
  864
- Subclock Oscillator Characteristics
  865
- PLL Characteristics
  866
- Internal Oscillator Characteristics
  866
- Regulator Characteristics
  866
- DC Characteristics
  867
- Pin Characteristics
  867
- Supply Current Characteristics
  869
- Data Retention Characteristics (in STOP Mode)
  870
- AC Characteristics
  871
- Measurement Conditions
  871
- Power On/Power Off/Reset Timing
  872
- Peripheral Function Characteristics
  873
- Interrupt Timing
  873
- Key Return Timing
  873
- Timer Timing
  873
- UART Timing
  874
- CSIB Timing
  874
- C Bus Mode
  876
- A/D Converter
  877
- LVI Circuit Characteristics
  878
- Flash Memory Programming Characteristics
  879
CHAPTER 31 ELECTRICAL SPECIFICATIONS (V850ES/JC3-L (48-Pin)) (Target)

881
- Absolute Maximum Ratings
  881
- Capacitance
  882
- Operating Conditions
  883
- Oscillator Characteristics
  884
- Main Clock Oscillator Characteristics
  884
- Subclock Oscillator Characteristics
  885
- PLL Characteristics
  886
- Internal Oscillator Characteristics
  886
- Regulator Characteristics
  886
- DC Characteristics
  887
- Pin Characteristics
  887
- Supply Current Characteristics
  889
- Data Retention Characteristics (in STOP Mode)
  890
- AC Characteristics
  891
- Measurement Conditions
  891
- Power On/Power Off/Reset Timing
  892
- Peripheral Function Characteristics
  893
- Interrupt Timing
  893
- Key Return Timing
  893
- Timer Timing
  893
- UART Timing
  894
- CSIB Timing
  894
- C Bus Mode
  896
- A/D Converter
  897
- D/A Converter
  898
- LVI Circuit Characteristics
  898
- Flash Memory Programming Characteristics
  899
CHAPTER 32 ELECTRICAL SPECIFICATIONS (V850ES/JE3-L) (Target)

901
- Absolute Maximum Ratings
  901
- Capacitance
  902
- Operating Conditions
  903
- Oscillator Characteristics
  904
- Main Clock Oscillator Characteristics
  904
- Subclock Oscillator Characteristics
  905
- PLL Characteristics
  906
- Internal Oscillator Characteristics
  906
- Regulator Characteristics
  906
- DC Characteristics
  907
- Pin Characteristics
  907
- Supply Current Characteristics
  909
- Data Retention Characteristics (in STOP Mode)
  910
- AC Characteristics
  911
- Measurement Conditions
  911
- Power On/Power Off/Reset Timing
  912
- Peripheral Function Characteristics
  913
- Interrupt Timing
  913
- Key Return Timing
  913
- Timer Timing
  913
- UART Timing
  914
- CSIB Timing
  914
- C Bus Mode
  916
- A/D Converter
  917
- D/A Converter
  918
- LVI Circuit Characteristics
  918
- Flash Memory Programming Characteristics
  919
Appendix A Development Tools

925
- Software Package
  927
- Language Processing Software
  927
- Control Software
  927
- Debugging Tools (Hardware)
  928
- When Using IECUBE QB-V850ESJX3L, QB-V850ESSX2
  928
- When Using MINICUBE QB-V850MINIL
  931
- When Using MINICUBE2 QB-MINI2
  932
- Debugging Tools (Software)
  932
- Embedded Software
  933
- Flash Memory Writing Tools
  933
Appendix B Major Differences between Products

934
Appendix C Register Index

935
Appendix D Instruction Set List

945
- Conventions
  945
- Instruction Set (in Alphabetical Order)
  948

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Renesas V850ES/JC3-L Manuals

Renesas V850ES/JC3-L User Manual (958 pages)

Table of Contents

Chapter 1 Introduction

Chapter 2 Pin Functions

Chapter 3 Cpu Function

Chapter 4 Port Functions

Chapter 5 Clock Generator

Chapter 6 16-Bit Timer/Event Counter P (Tmp)

Chapter 7 16-Bit Timer/Event Counter Q (Tmq)

Chapter 8 16-Bit Interval Timer M (Tmm)

Chapter 9 Watch Timer

Chapter 10 Real-Time Counter

Chapter 11 Watchdog Timer 2

Chapter 12 Real-Time Output Function (Rto)

Chapter 13 A/D Converter

CHAPTER 14 D/A CONVERTER (V850ES/JC3-L (48-Pin), V850ES/JE3-L)

Chapter 15 Asynchronous Serial Interface a (Uarta)

Chapter 16 Clocked Serial Interface B (Csib)

Chapter 17 I C Bus

Chapter 18 Dma Function (Dma Controller)

Chapter 19 Interrupt Servicing/Exception Processing Function

Chapter 20 Key Interrupt Function

Chapter 21 Standby Function

Chapter 22 Reset Function

Chapter 23 Clock Monitor

Chapter 24 Low-Voltage Detector (Lvi)

Chapter 25 Crc Function

Chapter 26 Regulator

Chapter 27 Option Byte

Chapter 28 Flash Memory

Chapter 29 On-Chip Debug Function

CHAPTER 30 ELECTRICAL SPECIFICATIONS (V850ES/JC3-L (40-Pin)) (Target)

CHAPTER 31 ELECTRICAL SPECIFICATIONS (V850ES/JC3-L (48-Pin)) (Target)

CHAPTER 32 ELECTRICAL SPECIFICATIONS (V850ES/JE3-L) (Target)

Appendix A Development Tools

Appendix B Major Differences between Products

Appendix C Register Index

Appendix D Instruction Set List

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