Nuvoton NuMicro MS51XC0BE Manuals

Manuals and User Guides for Nuvoton NuMicro MS51XC0BE. We have 1 Nuvoton NuMicro MS51XC0BE manual available for free PDF download: Technical Reference Manual

Nuvoton NuMicro MS51XC0BE Technical Reference Manual (491 pages)

8-bit Microcontroller

Brand: Nuvoton | Category: Microcontrollers | Size: 5 MB

Table of Contents
2
General Description
10
Features
11
Parts Information
15
Package Type
15
3.2 MS51 Series Selection Gude
15
3.3 MS51 Series Selection Code
16
Pin Configuration
17
MS51 32K Series Multi Function Pin Diagram
17
QFN 33-Pin Package Pin Diagram
17
Figure 4.1-1 Pin Assignment of LQFP-32 Package
17
LQFP 32-Pin Package Pin Diagram
18
Figure 4.1-2 Pin Assignment of LQFP-32 Package
18
TSSOP 28-Pin Package Pin Diagram
19
TSSOP 20-Pin Package Pin Diagram
19
Figure 4.1-3 Pin Assignment of TSSOP28 Package
19
Figure 4.1-4 Pin Assignment of TSSOP20 Package
19
QFN 20-Pin Package Pin Diagram
20
Figure 4.1-5 Pin Assignment of QFN20 Package
20
MS51 32K Series Pin Description
21
Block Diagram
25
MS51 32K Series Block Diagram
25
Figure 5.1-1 Functional Block Diagram
25
Functional Description
26
6.1 Memory Organization
26
Overview
26
Program Memory
26
Figure 6.1-1 MS51 Program Memory Map
27
Data Flash Memory
28
Security Protection Memory (SPROM)
28
CONFIG Bytes
28
Figure 6.1-2 SPROM Memory Mapping and SPROM Security Mode
28
Figure 6.1-3. CONFIG0 any Reset Reloading
29
Figure 6.1-4. CONFIG2 Power-On Reset Reloading
31
Data Memory
34
Figure 6.1-5 Data Memory Map
34
Figure 6.1-6 Internal 256 Bytes RAM Addressing
35
Special Function Register (SFR)
37
Table 6.1-1 Special Function Register Memory Map
39
Table 6.1-2 SFR Definitions and Reset Values
47
Table 6.1-3 Instructions that Affect Flag Settings
133
System Manager
201
Clock System
201
Figure 6.2-1 Clock System Block Diagram
201
Power Management
211
Power Monitoring
213
Figure 6.2-2 Brown-Out Detection Block Diagram
214
Table 6.2-1 BOF Reset Value
215
Table 6.2-2 Minimum Brown-Out Detect Pulse Width
218
Reset
219
Figure 6.2-3 Boot Selecting Diagram
224
Timed Access Protection (TA)
227
Interrupt System
230
Table 6.2-3 Interrupt Vectors
230
Table 6.2-4 Interrupt Priority Level Setting
236
Table 6.2-5 Characteristics of each Interrupt Source
238
Flash Memory Control
249
In-Application-Programming (IAP)
249
Table 6.3-1 IAP Modes and Command Codes
250
In-Circuit-Programming (ICP)
265
On-Chip-Debugger (OCD)
265
96-Bit Unique Code
267
Figure 6.3-1 CONFIG0 any Reset Reloading
268
Figure 6.3-2 CONFIG2 Power-On Reset Reloading
270
Table 6.4-1 Configuration for Different I/O Modes
272
Figure 6.4-1 Quasi-Bidirectional Mode Structure
273
Figure 6.4-2 Push-Pull Mode Structure
273
Figure 6.4-3 Input-Only Mode Structure
274
Figure 6.4-4 Open-Drain Mode Structure
274
Figure 6.4-5 Pin Interface Block Diagram
275
Figure 6.5-1 Timer/Counters 0 and 1 in Mode 0
288
Figure 6.5-2 Timer/Counters 0 and 1 in Mode 1
288
Figure 6.5-3 Timer/Counters 0 and 1 in Mode 2
288
Figure 6.5-4 Timer/Counter 0 in Mode 3
289
Figure 6.5-5 Timer 2 Block Diagram
297
Figure 6.5-6 Timer 2 Auto-Reload Mode and Input Capture Module Functional Block Diagram
298
Figure 6.5-7 Timer 2 Compare Mode and Input Capture Module Functional Block Diagram
299
Figure 6.5-8 Timer 3 Block Diagram
314
Table 6.6-1 PWM Pin Define and Enable Control Register
319
Figure 6.6-1 PWM0 Block Diagram
320
Figure 6.6-2 PWM1/2/3 Block Diagram
321
Figure 6.6-3 PWM0 and Fault Brake Output Control Block Diagram
322
Figure 6.6-4 PWM1/2/3 Control Block Diagram
323
Figure 6.6-5 PWM Edge-Aligned Type Waveform
324
Figure 6.6-6 PWM Center-Aligned Type Waveform
324
Figure 6.6-7 PWM0 Complementary Mode with Dead-Time Insertion
325
Figure 6.6-8 Fault Brake Function Block Diagram
326
Figure 6.6-9 PWM Interrupt Type
329
Table 6.7-1 Watchdog Timer-Out Interval under Different Pre-Scalars
352
Figure 6.7-1 WDT as a Time-Out Reset Timer
355
Figure 6.7-2 Watchdog Timer Block Diagram
355
Figure 6.8-1 Self Wake-Up Timer Block Diagram
359
Figure 6.9-1 Serial Port Mode 0 Timing Diagram
363
Figure 6.9-2 Serial Port Mode 1 Timing Diagram
364
Figure 6.9-3 Serial Port Mode 2 and 3 Timing Diagram
365
Table 6.9-1 Serial Port UART0 Mode / Baudrate Description
367
Table 6.9-2 Serial Port UART1 Mode / Baudrate Description
367
Figure 6.10-1 SC Controller Block Diagram
387
Table 6.10-1 Smart Card or UART Pin Define and Enable Control Register
388
Figure 6.10-2 SC Data Character
391
Figure 6.10-3 Initial Character TS
392
Figure 6.10-4 SC Error Signal
392
Figure 6.10-5 Transmit Direction Block Guard Time Operation
393
Figure 6.10-6 Receive Direction Block Guard Time Operation
393
Figure 6.10-7 Extra Guard Time Operation
393
Figure 6.11-1 I 2 C Bus Interconnection
408
Figure 6.11-2 I 2 C Bus Protocol
409
Figure 6.11-3 START, Repeated START, and STOP Conditions
409
Figure 6.11-4 Master Transmits Data to Slave by 7-Bit
410
Figure 6.11-5 Master Reads Data from Slave by 7-Bit
410
Figure 6.11-6 Data Format of One I C Transfer
410
Figure 6.11-7 Acknowledge Bit
411
Figure 6.11-8 Arbitration Procedure of Two Masters
411
Figure 6.11-9 Control I
412
Figure 6.11-10 Flow and Status of Master Transmitter Mode
413
Figure 6.11-11 Flow and Status of Master Receiver Mode
414
Figure 6.11-12 Flow and Status of Slave Receiver Mode
416
Figure 6.11-13 Flow and Status of General Call Mode
417
Figure 6.11-14 I 2 C Time-Out Counter
422
Figure 6.11-15 Hold Time Extend Enable
424
Figure 6.12-1 SPI Block Diagram
429
Figure 6.12-2 SPI Multi-Master, Multi-Slave Interconnection
430
Figure 6.12-3 SPI Single-Master, Single-Slave Interconnection
430
Figure 6.12-4 SPI Clock Formats
432
Figure 6.12-5 SPI Clock and Data Format with CPHA = 0
433
Figure 6.12-6 SPI Clock and Data Format with CPHA = 1
433
Figure 6.12-7 SPI Overrun Waveform
435
Figure 6.12-8 SPI Interrupt Request
435
Table 6.12-1 Slave Select Pin Configurations
438
Figure 6.13-1 12-Bit ADC Block Diagram
441
Figure 6.13-2 External Triggering ADC Circuit
444
Figure 6.13-3 ADC Result Comparator
444
Figure 6.13-4 ADC Continues Mode with DMA
445
Figure 7.1-1 Numicro MS51 Power Supply Circuit
469
Figure 7.2-1 Numicro
470
Figure 7.3-1 Nreset Reset Waveform
472
Figure 7.3-2 Low Voltage Reset (LVR) Waveform
473
Figure 7.3-3 Power-On Reset (POR) Waveform
476
Figure 7.3-4 Low Voltage Reset (LVR) Waveform
476
Figure 7.3-5 Brown-Out Detector (BOD) Waveform
477
Figure 9.1-1 QFN-33 Package Dimension
479
Figure 9.2-1 LQFP-32 Package Dimension
480
Figure 9.3-1 TSSOP-28 Package Dimension
481
Figure 9.4-1 TSSOP-20 Package Dimension
482
Figure 9.5-1 QFN-20 Package Dimension
483
Table 10.1-1 List of Abbreviations
484
Table 10.1-1 Instruction Set and Addressing Modes
485
Table 10.1-2 Instruction Set
489

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Nuvoton NuMicro MS51XC0BE Technical Reference Manual (491 pages)

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