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N.A.T. NAT-MCH Manuals
Manuals and User Guides for N.A.T. NAT-MCH. We have
6
N.A.T. NAT-MCH manuals available for free PDF download: Technical Reference, Reference Manual, Technical Reference Manual
N.A.T. NAT-MCH Technical Reference (57 pages)
clock-module
Brand:
N.A.T.
| Category:
Computer Hardware
| Size: 0.44 MB
Table of Contents
Table of Contents
4
Conventions
8
Table 1: List of Used Abbreviations
8
1 Board Specification
9
Table 2: NAT-MCH CLK Module Features
9
2 Statement on Environmental Protection
10
Compliance to Rohs Directive
10
Compliance to Weee Directive
10
Compliance to Ce Directive
11
3 Installation
12
Safety Note
12
Installation Prerequisites and Requirements
12
Requirements
12
Power Supply
12
Automatic Power up
12
4 Introduction
13
5 Clk Module Basics
14
6 Block Diagram of the Nat-Mch Clk Module
15
Figure 2: Block Diagram of the NAT-MCH CLK Module
15
7 Board Features
16
8 Functional Blocks
18
Stratum 3 Pll
18
Microprocessor
19
Clk-Multiplex Function
19
M-Lvds / Hcsl Transceiver
19
9 Location Overview
21
Figure 5: Location Diagram of the NAT-MCH CLK Module V2.1 (Top-View)
21
Figure 6: Location Diagram of the NAT-MCH CLK Module V2.1 (Bottom-View)
21
10 Connectors
23
Connector Overview
23
Figure 9: Connectors of the NAT-MCH CLK Module (Top View)
23
Figure 10: Connectors of the NAT-MCH CLK Module (Bottom View)
23
Mch Connector Con1
24
Table 3: MCH Connector CON1
24
Connector Con2: Interface to Basic-PCB
26
Table 4: Connector to Basic-PCB CON2
26
Connector CON3: Interface to Hub-PCB
27
Connector Jp1: Altera Fpga Programming Port
27
Table 5: Connector to Hub-PCB CON3
27
Table 6: Altera FPGA Programming Port
27
11 Nat-Mch Clk Module Programming Notes
28
Spi Interface
28
I²C Interface
28
Register
28
Figure 11: Detailed Functional Overview
28
Board Identifier Register
29
Firmware Version Register
29
PCB Revision Register
29
Table 7: Board Identifier Register
29
Table 8: PCB Revision Register
29
Table 9: FW_VERSION Register
29
FPGA Revision Register
30
Table 10: FPGA Revision Register
30
Reference 0 Selection Register
31
Table 11: REF0_SEL Register
31
Table 12: REF0_SEL - Register Bits
31
Reference 1 Selection Register
32
Table 13: REF1_SEL Register
32
Table 14: REF1_SEL - Register Bits
32
Source Selection 1 Register
33
Table 15: SRC_SEL1 Register
33
Table 16: SRC_SEL1 - Register Bits
33
Source Selection 2 Register
34
Table 17: SRC_SEL2 Register
34
Table 18: SRC_SEL2 - Register Bits
34
Source Selection 3 Register
35
Table 19: SRC_SEL3 Register
35
Table 20: SRC_SEL3 - Register Bits
35
Source Selection CLK1 Update Register
36
Table 21: SRC_SEL_CLK1_UD Register
36
Table 22: SRC_SEL_CLK1_UD - Register Bits
36
Source Selection CLK3 Update Register
37
Table 23: SRC_SEL_CLK3_UD Register
37
Table 24: SRC_SEL_CLK3_UD - Register Bits
37
Table 25: TRANSC_CTL1 Register
38
Table 26: TRANSC_CTL1 - Register Bits
38
Transceiver Control 1 Register
38
Table 27: TRANSC_CTL2 Register
39
Table 28: TRANSC_CTL2 - Register Bits
39
Transceiver Control 2 Register
39
Table 29: TRANSC_CTL3 Register
40
Table 30: TRANSC_CTL3 - Register Bits
40
Transceiver Control 3 Register
40
Table 31: TRANSC_CTL4 Register
41
Table 32: TRANSC_CTL4 - Register Bits
41
Transceiver Control 4 Register
41
Table 33: TRANSC_CTL5 Register
42
Table 34: TRANSC_CTL5 - Register Bits
42
Transceiver Control 5 Register
42
Table 35: TRANSC_CTL6 Register
43
Table 36: TRANSC_CTL6 - Register Bits
43
Transceiver Control 6 Register
43
Table 37: TRANSC_CTL7 Register
44
Table 38: TRANSC_CTL7 - Register Bits
44
Transceiver Control 7 Register
44
PLL Control 1 Register
45
Table 39: PLL_CTR1 Register
45
Table 40: PLL_CTR1 - Register Bits
45
PLL Control 2 Register
46
Table 41: PLL_CTR2 Register
46
Table 42: PLL_CTR2 - Register Bits
46
PLL Output Signals Register
47
Table 43: Pll_Outp Register
47
Table 44: Pll_Outp - Register Bits
47
Reserved Register
48
Table 45: RES_1 Register
48
Table 46: RES_2 Register
48
Table 47: RES_3 Register
48
Table 48: RES_4 Register
48
Table 49: RES_5 Register
48
Synchronized Clock Register
49
Table 50: RES_6 Register
49
Table 51: SYNC_CLK Register
49
Table 52: SYNC_CLK - Register Bits
50
LED2 Control Register
51
Table 53: LED2_CTR Register
51
Table 54: LED2_CTR - Register Bits
51
Holdover Function Control Register
52
Table 55: H_OVER_FUNKT_CTL Register
52
Table 56: H_OVER_FUNKT_CTL - Register Bits
52
External Reference Output Control Register
53
Table 57: EXT_REF_OUTP_CTL Register
53
Table 58: EXT_REF_OUTP_CTL Register Bits
53
Known Bugs / Restrictions
55
Appendix A: Reference Documentation
56
Appendix B: Document's History
57
Advertisement
N.A.T. NAT-MCH Reference Manual (36 pages)
?TCA Telecom MCH Module
Brand:
N.A.T.
| Category:
PCI Card
| Size: 0.44 MB
Table of Contents
Version 2.0 © N.A.T. Gmbh
2
Table of Contents
4
Conventions
7
Table 1: List of Used Abbreviations
7
1 Board Specification
8
Table 2: NAT-MCH Hub Module Pcie Features
8
Table 3: NAT-MCH Hub Module Pcie Technical Key Features
9
2 Statement on Environmental Protection
10
Compliance to Rohs Directive
10
Compliance to Weee Directive
10
Compliance to Ce Directive
11
3 Installation
12
Safety Note
12
Installation Prerequisites and Requirements
12
Requirements
12
Power Supply
12
Automatic Power up
12
4 Introduction
13
5 Hub Module Pcie Basics
14
6 Hub Module Pcie Block Diagram
15
Figure 1: Block Diagram of the NAT-MCH Hub Module Pcie
15
7 Board Features
16
8 Location Overview
17
Figure 2: Location Diagram of the NAT-MCH Hub Module Pcie (Top-View)
17
Figure 3: Location Diagram of the NAT-MCH Hub Module Pcie (Bottom-View)
17
9 Functional Blocks
18
Pci Express Switches
18
Table 4: 1 St Switch to Fabric Port Mapping
18
Spread Spectrum Clock
19
Microcontroller
19
Table 5: 2 Nd Switch to Fabric Port Mapping
19
10 Nat-Mch Hub Module Pcie Programming Notes
20
Spi Interface
20
I²C Interface
20
Register
20
Board Identifier Register
20
Table 6: Board Identifier Register
20
PCB Revision Register
21
Atmel Version
21
Hub Module Pcie Typ
21
Table 7: PCB Revision Register
21
Table 8: PCB Revision Register
21
Table 9: PCB Revision Register
21
Hot Plug Present 1 Register
22
Hot Plug Present 2 Register
22
Table 10: HP_PRSNT1 Register
22
Table 11: HP_PRSNT1 - Register Bits
22
Table 12: HP_PRSNT2 Register
22
Hot Plug Button 1 Register
23
Table 13: HP_PRSNT2 - Register Bits
23
Table 14: HP_BUTTON1 Register
23
Table 15: HP_BUTTON1 - Register Bits
23
Hot Plug Button 2 Register
24
Hot Plug Power Enable 1 Register
24
Table 16: HP_BUTTON2 Register
24
Table 17: HP_BUTTON2 - Register Bits
24
Table 18: HP_PWREN1 Register
24
Hot Plug Power Enable 2 Register
25
Table 19: HP_PWREN1 - Register Bits
25
Table 20: HP_PWREN2 Register
25
Table 21: HP_PWREN2 - Register Bits
25
Miscellaneous Control Register
26
Table 22: Misc_Ctrl Register
26
Table 23: Misc_Ctrl - Register Bits
26
11 Connectors
27
Connector Overview
27
Figure 4: Connectors of the NAT-MCH Hub Module Pcie (Top View)
27
Figure 5: Connectors of the NAT-MCH Hub Module Pcie (Bottom View)
27
NAT-MCH Hub Module Pcie Connector CON1
28
Table 24: Hub Module Pcie Backplane Connector CON1
28
NAT-MCH Hub Module X48 Extender Connector CON2
31
Table 25: Hub Module X48 Extender Backplane Connector CON2
31
Connector Con4: Interface to Clk-Module
33
Table 26: Connector to CLK-Module CON4
33
12 Known Bugs / Restrictions
34
Appendix A: Reference Documentation
35
Appendix B: Document's History
36
N.A.T. NAT-MCH Technical Reference Manual (32 pages)
mTCA Telecom MCH Module
Brand:
N.A.T.
| Category:
Computer Hardware
| Size: 1.05 MB
Table of Contents
Table of Contents
4
List of Tables
6
List of Figures
6
Conventions
7
Table 1: List of Used Abbreviations
7
1 Introduction
8
2 Overview
9
Major Features
9
Block Diagram
10
Figure 1: NAT-MCH BASE-Module - Block Diagram Incl. LED Module
10
Location Diagram
11
Figure 2: NAT-MCH BASE-Module - Location Diagram - Top-View
11
3 Board Features
12
Cpu
12
Memory
12
Ddr2Sdram
12
Flash
12
Backplane Interfaces
13
Ipmb
13
I²C
13
Ethernet
13
Front Panel Interfaces
13
Ethernet Uplink Ports
13
USB Debug Port
14
Clock Interface
14
Coax-IO
14
RJ45-Clock-Interface
15
Interface to Extension Modules
15
NAT-MCH CKL-Module / NAT-MCH CLK-PHYS-Module
15
NAT-MCH HUB-Module
15
Table 2: NAT-MCH BASE-Module - Coax-IO Signal Mapping
15
Table 3: NAT-MCH BASE-Module - Coax-IO Electrical Characteristics
15
Ethernet Switch
16
I 2 C Devices
16
4 Hardware
17
Front Panel and Leds
17
MCH Basic-Leds
17
RJ45-Leds
17
Status Leds
17
Figure 3: NAT-MCH BASE-Module - Front Panel
17
Connectors and Switches
18
Figure 4: NAT-MCH BASE-Module - Connectors - Overview
18
CON1: MCH Connector
19
Table 4: CON1: MCH Connector - Pin-Assignment
19
CON2: Extension Module Connector
21
JP1: Altera FPGA Programming Port
21
JP2: LED-Module Connector
21
Table 5: CON2: Extension Module Connector - Pin Assignment
21
Table 6: JP1: Altera FPGA Programming Port - Pin Assignment
21
Table 7: JP2: LED-Module Connector - Pin Assignment
21
JP3: Development Connector
22
P3: External Clock Transceiver Module Connector
22
SW1: Hot Swap Switch
22
SW2: General Purpose DIL Switch
22
Table 8: JP3: Development Connector - Pin Assignment
22
Table 9: P3: External Clock Transceiver Module Connector - Pin Assignment
22
S100: RJ45 Connector
23
S101: RJ45 Connector
23
S1: Micro USB Connector
23
Table 10: S1: Micro USB Connector - Pin Assignment
23
Table 11: S100: RJ45 Connector - Pin-Assignment
23
Table 12: S101: RJ45 Connector - Pin-Assignment - Gbe-Interface
23
Table 13: S101: RJ45 Connector - Pin-Assignment - RJ45-Clock-Interface
23
5 Programming Notes
24
Version 2.10 © N.A.T. Gmbh
24
6 Board Specification
25
Table 14: NAT-MCH BASE-Module - Features
25
7 Installation
26
Safety Note
26
Installation Prerequisites and Requirements
27
Requirements
27
Power Supply
27
Automatic Power up
27
Statement on Environmental Protection
28
Compliance to Rohs Directive
28
Compliance to WEEE Directive
28
Compliance to CE Directive
29
Product Safety
29
8 Known Bugs / Restrictions
30
Appendix A: Reference Documentation
31
Appendix B: Document's History
32
Advertisement
N.A.T. NAT-MCH Technical Reference Manual (34 pages)
mTCA Telecom MCH Module
Brand:
N.A.T.
| Category:
Switch
| Size: 0.77 MB
Table of Contents
Disclaimer
3
Table of Contents
4
List of Tables
5
List of Figures
5
Conventions
6
Table 1: List of Used Abbreviations
6
1 Introduction
7
Figure 1: Arrangement of Different NAT-MCH Modules
7
2 Overview
9
Major Features
9
Block Diagram
10
Figure 2: NAT-MCH HUB-Module SRIO - Block Diagram
10
Location Diagram
11
Figure 3: NAT-MCH HUB-Module SRIO - Location Diagram (Top)
11
Figure 4: NAT-MCH HUB-Module SRIO - Location Diagram (Bottom)
11
3 Functional Blocks
12
Srio Switches
12
Switch to Fabric Port Mapping
13
Table 2: 1
13
Table 3: 2
13
Table 4: Switch Port Mapping
14
Table 5: Switch Port Mapping NATIVE-R5 or NATIVE-C5
14
Microcontroller
15
Interfaces
16
Uplink Option
16
4 Hardware
17
Connectors
17
Figure 5: NAT-MCH HUB-Module SRIO - Connectors (Top)
17
Figure 6: NAT-MCH HUB-Module SRIO - Connectors of the (Bottom)
17
CON1: HUB-Module SRIO Backplane Connector
18
Table 6: CON1: HUB-Module SRIO Backplane Connector - Pin Assignment
18
CON2: HUB-Module X48 Extender Connector
20
Table 7: CON2: HUB-Module X48 Extender Backplane Connector - Pin Assignment
20
CON3: CLK-Module Connector
22
Table 8: CON3: CLK-Module Connector - Pin Assignment
22
CON4: Uplink-Module Connector
23
Table 9: CON4: Uplink-Module Connector - Pin Assignment
23
Table 10: Uplink1: 1 St Face Plate Interface - Pin Assignment
24
Table 11: Uplink2: 2 Nd Face Plate Interface - Pin Assignment
24
Uplink1: 1 St Face Plate Interface
24
Uplink2: 2 Nd Face Plate Interface
24
5 Programming Notes
25
Spi Interface
25
I²C Interface
25
Register
25
Board Identifier Register
25
Table 12: Board Identifier Register
25
PCB Revision Register
26
Firmware Version
26
Hub Module SRIO Type
26
Table 13: PCB_REV Register
26
Table 14: FW_VERSION Register
26
Table 15: SRIO_TYPE Register
26
Miscellaneous Control Register
27
Table 16: MISC_CTL Register
27
Table 17: MISC_CTL - Register Bits
27
6 Board Specification
28
Table 18: NAT-MCH HUB-Module SRIO Features
28
7 Installation
29
Safety Note
29
Installation Prerequisites and Requirements
29
Requirements
29
Power Supply
29
Automatic Power up
29
Statement on Environmental Protection
30
Compliance to Rohs Directive
30
Compliance to WEEE Directive
30
Compliance to CE Directive
31
Product Safety
31
Compliance to REACH
31
8 Known Bugs / Restrictions
32
Version 1.5 © N.A.T. Gmbh
32
Appendix A: Reference Documentation
33
Appendix B: Document's History
34
N.A.T. NAT-MCH Technical Reference Manual (32 pages)
HUB-Module XAUI mTCA Telecom MCH Module
Brand:
N.A.T.
| Category:
Computer Hardware
| Size: 0.73 MB
Table of Contents
Disclaimer
3
Table of Contents
4
List of Tables
5
List of Figures
5
Conventions
6
Table 1: List of Used Abbreviations
6
1 Introduction
7
Figure 1: Arrangement of Different NAT-MCH Modules
7
2 Overview
9
Major Features
9
Technical Features
9
Block Diagram
10
Figure 2: NAT-MCH HUB-Module XAUI - Block Diagram
10
Location Diagram
11
Figure 3: NAT-MCH HUB-Module XAUI - Location Diagram (Top)
11
Figure 4: NAT-MCH HUB-Module XAUI - Location Diagram (Bottom)
11
3 Functional Blocks
12
Xaui Switch
12
Fpga
12
Table 2: AMC Slot to Switch Port Assignment
12
Microcontroller
13
Interfaces
13
Uplink Option
13
4 Hardware
14
Connectors
14
Connector Overview
14
Figure 5: NAT-MCH HUB-Module XAUI - Connectors (Top)
14
Figure 6: NAT-MCH HUB-Module XAUI - Connectors (Bottom)
14
CON1: HUB-Module XAUI Backplane Connector
15
Table 3: CON1: HUB-Module XAUI Backplane Connector - Pin Assignment
15
CON2: HUB-Module X48 Extender Connector
17
CON3: CLK-Module Connector
19
Table 5: CON3: CLK-Module Connector - Pin Assignment
19
CON4: Uplink-Module Connector
20
Table 6: CON4: Uplink-Module Connector - Pin Assignment
20
JP1: FPGA Programming Interface
21
Table 7: JP1: FPGA Programming Interface - Pin Assignment
21
5 Programming Notes
22
Board Identifier Register
22
Pcb Revision Register
22
Table 8: Board Identifier Register
22
Table 9: PCB_REV Register
22
Firmware Version
23
Hub Module Xaui Type
23
Fpga Revision Register
23
Table 10: FW_VERSION Register
23
Table 11: XAUI_TYP Register
23
Table 12: FPGA Revision Register
23
Switch Control Register
24
Reserved
24
Table 13: SW_CTL Register
24
Table 14: SW_CTL - Register Bits
24
Table 15: RSVD Register
24
Spi Multiplexer Control
25
Table 16: SPI_MUX_CTL Register
25
Table 17: SPI_MUX_CTL - Register Bits
25
6 Board Specification
26
Table 18: NAT-MCH HUB-Module XAUI - Features
26
7 Installation
27
Safety Note
27
Installation Prerequisites and Requirements
27
Requirements
27
Power Supply
27
Automatic Power up
27
Statement on Environmental Protection
28
Compliance to Rohs Directive
28
Compliance to WEEE Directive
28
Compliance to CE Directive
29
Product Safety
29
Compliance to REACH
29
8 Known Bugs / Restrictions
30
Appendix A: Reference Documentation
31
Appendix B: Document's History
32
N.A.T. NAT-MCH Technical Reference Manual (30 pages)
mTCA Telecom MCH Module
Brand:
N.A.T.
| Category:
Computer Hardware
| Size: 0.76 MB
Table of Contents
Disclaimer
3
Table of Contents
4
List of Tables
5
List of Figures
5
Conventions
6
Table 1: List of Used Abbreviations
6
1 Introduction
7
Figure 1: Arrangement of Different NAT-MCH Modules
7
2 Overview
8
Major Features
8
Block Diagram
9
Figure 2: Figure 2: NAT-MCH HUB-Module Pcie - Block Diagram
9
Location Diagram
10
Figure 3: NAT-MCH HUB-Module Pcie - Location Diagram (Top)
10
Figure 4: NAT-MCH HUB-Module Pcie - Location Diagram (Bottom)
10
3 Board Features
11
Pci Express Switch Plx Pex8748
11
Table 2: Pcie Switch Lane to MCH Fabric Port Mapping
11
Backplane
12
Table 3: Switch Lanes to AMC Port Mapping for X4-Link on a Standard Microtca
12
Microcontroller
13
Fpga
13
Multiplexing Units
13
Pcie Interfaces
13
Interface to Nat-Mch Clk-Module
13
Nterface to Nat-Mch Base-Module
13
4 Hardware
14
Leds
14
Table 4: LED State - Link Status
14
Connectors
15
Figure 5: NAT-MCH HUB-Module Pcie - Connectors (Top)
15
Figure 6: NAT-MCH HUB-Module Pcie - Connectors (Bottom)
15
CON1: AMC Connector to
16
Tongue
16
Table 5: CON1: AMC Connector to 3
16
Tongue - Pin Assignment
16
Tongue
18
Table 6: CON2: AMC Connector to 4
18
Tongue - Pin Assignment
18
CON3: Connector to NAT-MCH CLK/BASE-Module
20
JP1: JTAG Programming Interface
20
Table 7: CON3: Connector to NAT-MCH CLK/BASE-Module - Pin Assignment
20
J1: Connector to Optional Root-Complex
21
Table 8: J1: Connector to Optional Root-Complex - Pin Assignment
21
5 Programming Notes
22
Spi Interface
22
SPI-Interface - Default Mode
22
SPI-Interface - Update Mode
22
I²C Interface
22
Register
22
Board Identifier Register
22
Table 9: Board Identifier Register
22
PCB Revision Register
23
Atmel Version
23
Table 10: PCB Revision Register
23
Table 11: Atmel Revision Register
23
6 Board Specification
24
Table 12: NAT-MCH HUB-Module Pcie Features
24
7 Installation
25
Safety Note
25
Installation Prerequisites and Requirements
25
Requirements
25
Power Supply
25
Automatic Power up
25
Statement on Environmental Protection
26
Compliance to Rohs Directive
26
Compliance to WEEE Directive
26
Compliance to CE Directive
27
Product Safety
27
Compliance to REACH
27
8 Known Bugs / Restrictions
28
Appendix A: Reference Documentation
29
Appendix B: Document's History
30
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