Mips Technologies Malta Manuals

Manuals and User Guides for Mips Technologies Malta. We have 1 Mips Technologies Malta manual available for free PDF download: User Manual

Mips Technologies Malta User Manual

Mips Technologies Malta User Manual (61 pages)

Development Board

Brand: Mips Technologies | Category: Motherboard | Size: 0 MB

Table of Contents

Table of Contents
3
Chapter 1: Introduction

7
- Overview
  7
- Figure 1.1: Malta TM Development Platform Block Diagram
  8
Chapter 2: Getting Started

11
- Required Hardware
  11
- Optional Hardware
  11
- Wiring It up
  12
- Power-Up Sequence
  12
Chapter 3: Memory Map

13
- Table 3.1 Malta Physical Memory Map
  13
  - Revision Information
    14
  - Table 3.2: I2C Slave Address Map
    14
  - Table 3.3 REVISION Register
    14
  - NMI Interrupts
    15
  - NMI Acknowledge
    15
  - Table 3.4 NMISTATUS Register
    15
  - Switches / Status
    16
  - Table 3.5 NMIACK Register
    16
  - Table 3.6 SWITCH Register
    16
  - Table 3.7 STATUS Register
    16
  - Displays
    17
  - Table 3.8 JMPRS Register
    17
  - Table 3.9 Display Registers. BASE = 0X1F00.0400
    17
  - Table 3.10 LEDBAR Register
    18
  - Reset Control
    19
  - Table 3.11 ASCIIWORD Register
    19
  - Table 3.12 ASCIIPOS0-7 Registers
    19
  - Table 3.13 SOFTRES Register
    19
  - CBUS UART, Tty2
    20
  - General Purpose I/O
    20
  - Table 3.14 BRKRES Register
    20
  - Table 3.15 UART Registers. BASE = 0X1F00.0900
    20
  - I2C
    21
  - Table 3.16 GPOUT Register
    21
  - Table 3.17 GPINP Register
    21
  - Table 3.18 I2CINP Register
    22
  - Table 3.19 I2COE Register
    22
  - Table 3.20 I2COUT Register
    22
  - Table 3.21 I2CSEL Register
    23
Chapter 4: Board Layout

25
- Figure 4.1 Malta Board Layout
  25
  - Connectors & Jumpers
    26
  - Figure 4.2 Rear Panel Connector Layout
    26
  - Table 4.1 Interface Connectors
    26
  - Table 4.2 Jumpers
    27
  - Switches
    28
  - Table 4.3 Switches
    28
  - Displays / Leds
    29
  - Table 4.4 Leds
    29
  - Table 4.5 Ethernet Connector LED Functionality
    30
Chapter 5: Hardware Description

31
- PCI Bus
  31
  - Table 5.1 IDSEL and INT# for PCI Devices
    31
  - 1: PCI Arbiter
    32
- I2C Bus
  32
- Power
  32
- Figure 5.1 PCI Arbiter Connections
  32
- Reset
  33
- Clocks
  33
- Interrupt Controller
  33
- Figure 5.2 Interrupt Wiring
  35
- Table 5.2 IRQ 0..15 Mapping
  36
- Table 5.3 CPU INT0..5 and CPU NMI Mapping
  36
- Serial Ports
  37
  - 1: File Download
    37
  - Table 5.4 Serial Port Pinouts
    37
  - 2: Serial Port Reset
    38
- Ethernet
  38
- Usb
  38
- Keyboard / Mouse / IEEE1284 Parallel Port / Floppy Disk
  38
- Real Time Clock (RTC)
  39
- Ide/Compactflash (True IDE Mode)
  39
- Flash Memory
  39
- Eeprom
  39
- AMR (Audio Modem Riser)
  40
- Front Panel Connector
  40
- Debug Access
  40
  - 1: Software Debug
    40
  - 2: Hardware Debug
    40
  - Figure 5.3 Front Panel Connector
    40
  - Table 5.5 Testpoints
    40
  - Table 5.6 Logic Analyser Connectors
    41
Chapter 6: 1284 Flash Download Format

45
- Table 6.1 Download Codes
  46
- Table 6.2 Flash Download Error Messages
  46
Chapter 7: Core Card Design

49
- Required Interfaces
  49
  - 1: Power
    49
  - 2: PCI Bus
    49
  - 3: Clock
    49
  - 4: Revision Number
    49
  - 5: I2C Bus
    49
  - 6: Interrupts
    49
  - 7: Endian
    50
  - 8: Cbus
    50
  - Figure 7.1 CBUS Read Cycle
    50
  - 9: Ejtag
    51
  - 10: Misc
    51
  - Figure 7.2 CBUS Write Cycle
    51
  - Table 7.1 CBUS AC Timing Parameters
    51
- Signals
  52
  - Table 7.2 Core Card Interface Signals
    52
  - 1: J3 Connector
    53
  - Table 7.3 J3 Pin List
    53
  - 2: J4 Connector
    55
  - Table 7.4 J4 Pin List
    55
- Physical Design
  56
- Figure 7.3 J3 and J4 Alignment
  57
- Table 7.5 Core Card Component Height Restrictions
  57
- Figure 7.4 Core Card Template Layout
  58
- Revision History
  61

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