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JYTEK PCIe-69814P manual available for free PDF download: User Manual
JYTEK PCIe-69814P User Manual (34 pages)
4-CH 12-Bit 80MS/s Digitizer
Brand:
JYTEK
| Category:
Measuring Instruments
| Size: 1 MB
Table of Contents
Getting Service
2
Table of Contents
3
Introduction
7
1�1 Features
7
Applications
7
Specifications
8
1�3�1 Analog Input
8
Table 1-1: Channel Characteristics
9
Figure 1-1: Analog Input Channel Bandwidth, ±0.2 Vpp
9
1�3�2 Timebase
10
1�3�3 Triggers
10
General Specifications
10
Software Support
11
1�4�1 Wd-Dask
11
1�5 Device Layout and I/O Array
12
Figure 1-2: Pcie-69814 Schematic
12
Figure 1-3: Pcie-69814 I/O Array
13
Table 1-2: Pcie-69814 I/O Array Legend
14
Getting Started
15
Installation Environment
15
2�2 Installing the Module
16
Operations
17
Functional Block Diagram
17
3�2 Analog Input Channel
17
Analog Input Front-End Configuration
17
Figure 3-1: Analog Input Architecture
17
3�2�2 Input Range and Data Format
18
3�2�3 DMA Data Transfer
18
Table 3-1: Input Range and Data Format
18
Table 3-2: Input Range FSR and -FSR Values
18
Table 3-3: Input Range Midscale Values
18
Figure 3-2: Linked List of PCI Address DMA Descriptors
19
3�2�4 Synchronous Digital Input
20
Figure 3-3: Synchronous Digital Input Operations
20
3�3 Trigger Source and Trigger Modes
21
Software Trigger
21
Figure 3-4: Trigger Architecture
21
External Digital Trigger
22
3�3�3 Analog Trigger
22
Figure 3-5: External Digital Trigger
22
3�4 Trigger Modes
23
3�4�1 Post Trigger Mode
23
3�4�2 Delayed Trigger Mode
23
Figure 3-6: Post-Trigger Acquisition
23
Figure 3-7: Delayed Trigger Mode Acquisition
23
3�4�3 Pre-Trigger Mode
24
3�4�4 Middle Trigger Mode
24
Acquisition with Re-Triggering
24
Figure 3-8: Pre-Trigger Mode Acquisition
24
Figure 3-9: Middle Trigger Mode Acquisition
24
Figure 3-10: Re-Trigger Mode Acquisition
25
3�5 Timebase
26
Internal Sampling Clock
26
External Reference Clock (Pcie-69814P Only)
26
External Sampling Clock
26
Figure 3-11: Pcie-69814 Clock Architecture
26
3�6 ADC Timing Control
27
3�6�1 Timebase Architecture
27
Basic Acquisition Timing
27
Figure 3-12: Pcie-69814 Timebase Architecture
27
Figure 3-13: Basic Digitizer Acquisition Timing
27
Table 3-4: Counter Parameters and Description
28
Figure 3-14: Varying Sampling Rates by Adjusting Scan Interval Counter
28
Synchronizing Multiple Modules
29
Table 3-5: SSI Signal Location and Pin Definition
29
Card Number Configuration
30
Figure 3-15: Card Number Configuration Switch
30
3�7�2 Ssi_Trig
31
3�8 Sdi
31
Table 3-6: Card Number Configuration Settings
31
Table 3-7: SDI Input Vs� Data
31
Multi-Boot
32
Figure 3-16: Flash Memory Configuration Switch
32
Appendix A Calibration
33
Calibration Constant
33
Auto-Calibration
33
Important Safety Instructions
34
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