User Manuals: Diodes PI7C9X2G304EL PCIe Switch

Manuals and User Guides for Diodes PI7C9X2G304EL PCIe Switch. We have 1 Diodes PI7C9X2G304EL PCIe Switch manual available for free PDF download: Manual

Diodes PI7C9X2G304EL Manual (91 pages)

PCI EXPRESS GEN 2 PACKET SWITCH 3-Port, 4-Lane, ExtremeLo PCIe2.0 Packet Switch

Brand: Diodes | Category: Switch | Size: 1 MB

Table of Contents
4
Features
9
General Description
10
Pin Description
12
Pci Express Interface Signals
12
Port Configuration Signals
13
Miscellaneous Signals
13
Jtag Boundary Scan Signals
15
Power Pins
15
Pin Assignments
16
Pin List of 136-Pin Aqfn
16
Functional Description
17
Physical Layer Circuit
17
Receiver Detection
17
Receiver Signal Detection
18
Receiver Equalization
18
Transmitter S Wing
18
Drive Amplitude and De-Emphasis Settings
18
Drive Amplitude
19
Drive De-Emphasis
20
Transmitter Electrical Idle Latency
20
Data Link Layer (Dll)
20
Transaction Layer Receive Block (Tlp Decapsulation)
21
Routing
21
Tc/VC Mapping
21
Queue
22
Nphd
22
Cplh
22
Cpld
22
Transaction Ordering
22
Port Arbitration
23
VC Arbitration
24
Flow Control
24
Transation Layer Transmit Block (Tlp Encapsulation)
24
Access Controls Service
24
Eeprom Interface and System Management Bus
25
Eeprom Interface
25
Auto Mode Eerpom Access
25
Eeprom Mode at Reset
25
Eeprom Space Address Map
25
Mapping Eeprom Contents to Configuration Registers
28
Smbus INTERFACE
35
Register Description
36
Register Types
36
Transparent Mode Configuration Registers
36
VENDOR ID REGISTER - OFFSET 00H
38
COMMAND REGISTER - OFFSET 04H
38
PRIMARY STATUS REGISTER - OFFSET 04H
39
REVISION ID REGISTER - OFFSET 08H
40
CLASS CODE REGISTER - OFFSET 08H
40
CACHE LINE REGISTER - OFFSET 0Ch
40
PRIMARY LATENCY TIMER REGISTER - OFFSET 0Ch
40
HEADER TYPE REGISTER - OFFSET 0Ch
40
PRIMARY BUS NUMBER REGISTER - OFFSET 18H
40
SECONDARY BUS NUMBER REGISTER - OFFSET 18H
40
SUBORDINATE BUS NUMBER REGISTER - OFFSET 18H
41
SECONDARY LATENCY TIMER REGISTER - OFFSET 18H
41
I/O BASE ADDRESS REGISTER - OFFSET 1Ch
41
I/O LIMIT ADDRESS REGISTER - OFFSET 1Ch
41
SECONDARY STATUS REGISTER - OFFSET 1Ch
41
MEMORY BASE ADDRESS REGISTER - OFFSET 20H
42
MEMORY LIMIT ADDRESS REGISTER - OFFSET 20H
42
PREFETCHABLE MEMORY BASE ADDRESS REGISTER - OFFSET 24H
42
PREFETCHABLE MEMORY LIMIT ADDRESS REGISTER - OFFSET 24H
43
PREFETCHABLE MEMORY BASE ADDRESS UPPER 32-BITS REGISTER - OFFSET 28H
43
PREFETCHABLE MEMORY LIMIT ADDRESS UPPER 32-BITS REGISTER - OFFSET 2Ch
43
I/O BASE ADDRESS UPPER 16-BITS REGISTER - OFFSET 30H
43
I/O LIMIT ADDRESS UPPER 16-BITS REGISTER - OFFSET 30H
43
CAPABILITY POINTER REGISTER - OFFSET 34H
44
INTERRUPT LINE REGISTER - OFFSET 3Ch
44
INTERRUPT PIN REGISTER - OFFSET 3Ch
44
BRIDGE CONTROL REGISTER - OFFSET 3Ch
44
POWER MANAGEMENT CAPABILITY REGISTER - OFFSET 40H
45
POWER MANAGEMENT DATA REGISTER - OFFSET 44H
45
PPB SUPPORT EXTENSIONS - OFFSET 44H
46
DATA REGISTER - OFFSET 44H
46
MSI CAPABILITY REGISTER - OFFSET 4Ch (Downstream Port Only)
46
MESSAGE CONTROL REGISTER - OFFSET 4Ch (Downstream Port Only)
46
MESSAGE ADDRESS REGISTER - OFFSET 50H (Downstream Port Only)
47
MESSAGE UPPER ADDRESS REGISTER - OFFSET 54H (Downstream Port Only)
47
MESSAGE DATA REGISTER - OFFSET 58H (Downstream Port Only)
47
VPD CAPABILITY REGISTER - OFFSET 5Ch (Upstream Port Only)
47
VPD REGISTER - OFFSET 5Ch (Upstream Port Only)
47
VPD DATA REGISTER - OFFSET 60H (Upstream Port Only)
48
VENDOR SPECIFIC CAPABILITY REGISTER - OFFSET 64H
48
XPIP CSR0 - OFFSET 68H (Test Purpose Only)
48
XPIP CSR1 - OFFSET 6Ch (Test Purpose Only)
48
REPLAY TIME-OUT COUNTER - OFFSET 70H
48
ACKNOWLEDGE LATENCY TIMER - OFFSET 70H
49
SWITCH OPERATION MODE - OFFSET 74H (Upstream Port Only)
49
SWITCH OPERATION MODE - OFFSET 74H (Downstream Port Only)
50
XPIP_CSR2 - OFFSET 78H
51
PHY PARAMETER 1 - OFFSET 78H
51
PHY PARAMETER 2 - OFFSET 7Ch
51
XPIP_CSR3 - OFFSET 80H
52
XPIP_CSR4 - OFFSET 84H
52
XPIP_CSR5 - OFFSET 88H
52
TL_CSR - OFFSET 8Ch
53
PHY PARAMETER 3 - OFFSET 90H
54
PHY PARAMETER 4 - OFFSET 94H
54
OPERATION MODE -OFFSET 98H
54
SSID/SSVID CAPABILITY REGISTER - OFFSET B0H
54
SUBSYSTEM VENDOR ID REGISTER - OFFSET B4H
55
SUBSYSTEM ID REGISTER - OFFSET B4H
55
GPIO CONTROL REGISTER - OFFSET B8H (Upstream Port Only)
55
EEPROM CONTROL REGISTER - OFFSET Bch (Upstream Port Only)
56
EEPROM ADDRESS REGISTER - OFFSET Bch (Upstream Port Only)
57
EEPROM DATA REGISTER - OFFSET Bch (Upstream Port Only)
57
PCI EXPRESS CAPABILITY REGISTER - OFFSET C0H
57
DEVICE CAPABILITIES REGISTER - OFFSET C4H
58
DEVICE CONTROL REGISTER - OFFSET C8H
58
DEVICE STATUS REGISTER - OFFSET C8H
59
LINK CAPABILITIES REGISTER - OFFSET Cch
60
LINK CONTROL REGISTER - OFFSET D0H
61
LINK STATUS REGISTER - OFFSET D0H
61
SLOT CAPABILITIES REGISTER - OFFSET D4H (Downstream Port Only)
62
SLOT CONTROL REGISTER - OFFSET D8H (Downstream Port Only)
63
SLOT STATUS REGISTER OFFSET D8H (Downstream Port Only)
64
DEVICE CAPABILITIES REGISTER 2 - OFFSET E4H
64
DEVICE CONTROL REGISTER 2 - OFFSET E8H
65
DEVIDE STATUS REGISTER 2 - OFFSET E8H
65
LINK CAPABILITIES REGISTER 2 - OFFSET Ech
65
LINK CONTROL REGISTER 2 - OFFSET F0H
65
LINK STATUS REGISTER 2 - OFFSET F0H
65
SLOT CAPABILITIES REGISTER 2 - OFFSET F4H
66
SLOT CONTORL REGISTER 2 - OFFSET F8H
66
SLOT STATUS REGISTER 2 - OFFSET F8H
66
PCI EXPRESS ADVANCED ERROR REPORTING CAPABILITY REGISTER - OFFSET 100H
66
UNCORRECTABLE ERROR STATUS REGISTER - OFFSET 104H
66
UNCORRECTABLE ERROR MASK REGISTER - OFFSET 108H
67
UNCORRECTABLE ERROR SEVERITY REGISTER - OFFSET 10Ch
68
CORRECTABLE ERROR STATUS REGISTER - OFFSET 110 H
69
CORRECTABLE ERROR MASK REGISTER - OFFSET 114 H
69
ADVANCE ERROR CAPABILITIES and CONTROL REGISTER - OFFSET 118H
70
HEADER LOG REGISTER - OFFSET from 11Ch to 128H
70
PCI EXPRESS VIRTUAL CHANNEL CAPABILITY REGISTER - OFFSET 140H
70
PORT VC CAPABILITY REGISTER 1 - OFFSET 144H
70
PORT VC CAPABILITY REGISTER 2 - OFFSET 148H
71
PORT VC CONTROL REGISTER - OFFSET 14Ch
71
PORT VC STATUS REGISTER - OFFSET 14Ch
71
VC RESOURCE CAPABILITY REGISTER (0) - OFFSET 150H
72
VC RESOURCE CONTROL REGISTER (0) - OFFSET 154H
72
VC RESOURCE STATUS REGISTER (0) - OFFSET 158H
73
100 VC RESOURCE CAPABILITY REGISTER (1) - OFFSET 15Ch
73
101 VC RESOURCE CONTROL REGISTER (1) - OFFSET 160H
73
102 VC RESOURCE STATUS REGISTER (1) - OFFSET 164H
74
103 VC ARBITRATION TABLE REGISTER - OFFSET 170H
74
104 PORT ARBITRATION TABLE REGISTER (0) and (1) - OFFSET 180H and 1C0H
75
105 PCI EXPRESS POWER BUDGETING CAPABILITY REGISTER - OFFSET 20Ch
75
106 DATA SELECT REGISTER - OFFSET 210H
75
107 POWER BUDGETING DATA REGISTER - OFFSET 214H
76
108 POWER BUDGET CAPABILITY REGISTER - OFFSET 218H
76
109 ACS EXTENDED CAPABILITY HEADER - OFFSET 220H (Downstream Port Only)
76
110 ACS CAPABILITY REGISTER - OFFSET 224H (Downstream Port Only)
76
111 EGRESS CONTROL VECTOR - OFFSET 228H (Downstream Port Only)
77
112 LTR EXTENDED CAPABILITY HEADER - OFFSET 230H (Upstream Port Only)
77
113 MAX SNOOP LATENCY REGISTER - OFFSET 234H (Upstream Port Only)
78
114 MAX NO-SNOOP LATENCY REGISTER - OFFSET 234H (Upstream Port Only)
78
Clock Scheme
79
Ieee 1149.1 Compatible Jtag Controller
80
Instruction Register
80
Bypass Register
80
Device ID Register
80
Bounda Ry Scan Register
81
Jtag Boundary Scan Register Order
81
Power Management
83
Power Sequence
84
Electrical and Timing Specifications
85
Absolute Maximum Ratings
85
DC Specifications
85
Ac Specifications
85
Operating Ambient Temperature
87
Power Consumption
87
Package Information
88
Pi7C9X2G304El
89
Ordering Information
90

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User Manuals: Diodes PI7C9X2G304EL PCIe Switch

Diodes PI7C9X2G304EL Manual (91 pages)

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