Alpha Data ADM-VB630(T) Manuals

Manuals and User Guides for Alpha Data ADM-VB630(T). We have 1 Alpha Data ADM-VB630(T) manual available for free PDF download: User Manual

Alpha Data ADM-VB630(T) User Manual (40 pages)

Brand: Alpha Data | Category: Motherboard | Size: 1 MB

Table of Contents
3
Introduction
7
Key Features
7
References & Specifications
7
Table 1 References
7
Order Code
8
Table 2 Build Options
8
Installation
9
Handling Instructions
9
Hardware Installation
9
System Requirements
9
Cooling Requirements
9
Software Installation
10
Order Code
10
Figure 1 ADM-VB630
10
Board Information
11
Physical Specifications
11
Chassis Requirements
11
Mechanical Requirements
11
Power Requirements
11
Table 3 Mechanical Dimensions
11
Table 4 Available Power by Rail
11
Thermal Performance
12
Customizations
12
Functional Description
13
Overview
13
Figure 2 ADM-VB630 Block Diagram
13
Switch Definitions
14
Table 5 VPX Control Switch Definitions (SW1)
14
Table 6 Processor Setup Switch Definitions (SW2)
14
LED Definitions
15
Figure 3 LED and Switch Locations
15
Table 7 Sysmon Leds
16
Table 8 User Defined Leds
16
Table 9 Status LED Definitions
16
VPX P0 Interface
17
Sysreset
17
Auxclk
17
Refclk
17
VPX P1 Interfaces
17
REFCLK1 and REFCLK2
17
Interfaces
17
PS Interfaces
17
Vpx P2 Io
17
Single Ended PL GPIO[47:0]
17
Single Ended PL GPIO[55:48]
18
Single Ended PS MIO[23:16]
18
PS Interfaces
18
JTAG Interface
19
On-Board Interface
19
VPX Interface
19
JTAG Voltages
19
Figure 4 JTAG Boundary Scan Chain
19
Clocks
20
Figure 5 Clocks
20
DDR4 Memory Reference Clock (MEM_CLK)
21
Programmable Clock (PROG_CLK)
21
Ps_Refclk
21
Resets
21
Table 10 MEM_CLK Connections
21
Table 11 PROGCLK0 Connections
21
Table 12 PS_REFCLK Connection
21
Table 13 Reset Switches
21
Adaptive Soc PS Block
22
Boot Modes
22
Configuration Daughter Board
22
QSPI Flash Memory
22
Microsd Card
22
Ethernet RGMII Interface
22
UART Interfaces
22
Table 14 Boot Mode Selection
22
CAN Interfaces
23
Adaptive Soc PL Side
23
I/O Bank Voltages
23
MGT Links
23
VPX P2 GPIO Interface
23
VPX GPIO Buffers
23
Table 15 CAN PL Side Connections
23
Table 16 PL Adaptive Soc IO Banks
23
Table 17 PL MGT Links
23
Table 18 VPX P2 GPIO Groups
23
DDR4 Memory
24
System Monitoring
24
Automatic Temperature Monitoring
24
Table 19 Buffer Pins
24
Table 20 Voltage and Temperature Monitoring Points
24
Table 21 Temperature Limits
24
System Monitor Status Leds
25
Table 22 System Monitor Status Leds
25
Configuration
26
Configuration from QSPI Flash Memory
26
Building and Programming QSPI Configuration Images
26
Configuration from Usd Flash Memory
26
Building and Programming Usd Configuration Images
26
Configuration Via JTAG
27
Appendix A: P1 Pin Assignments
29
Data Plane 1 (P1 Wafers 1-4)
29
Data Plane 2 (P1 Wafers 5-8)
29
Ethernet Pins (P1 Wafers 9-11)
29
UART0 Interface (P1 Wafer 12)
29
Table 23 Data Plane 1 (P1 Wafers 1-4)
29
Table 24 Data Plane 2 (P1 Wafers 5-8)
29
Table 25 Ethernet (P1 Wafers 9-11)
29
Spacewire Interface (P1 Wafers 13-16)
30
Table 26 Spacewire Interface (P1 Wafer 12)
30
Table 27 Spacewire Interface (P1 Wafers 13-16)
30
Appendix B: P2 Pin Assignments
31
GPIO (P2 Wafers 1-14)
31
MIO (P2 Wafers 15-16)
32
Serial Interfaces (P2 G Column)
32
Table 28 GPIO (P2 Wafers 1-14)
32
Table 29 MIO (P2 Wafers 15-16)
32
Table 30 Serial (P2 G Column)
32
Appendix C: MIO Map
33
Table 31 MIO Map
33
Appendix D: DDR4 Pinout Table
36
Table 32 DDR4 Pinout Table
36
Revision History
40

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