Actions ATJ2135 Manuals

Manuals and User Guides for Actions ATJ2135. We have 1 Actions ATJ2135 manual available for free PDF download: Programming Manual

Actions ATJ2135 Programming Manual

Actions ATJ2135 Programming Manual (192 pages)

Brand: Actions | Category: Microcontrollers | Size: 1 MB

Table of Contents

Declaration
2
Table of Contents
4
Contents
4
List of Figures
12
List of Tables
13
Revision History
19
1 Introduction

20
2 Pin Description

21
- Pin Assignment
  21
- Pin Definition
  22
- Table 1: ATJ2135 Pin Definition
  22
3 Functional Block and Memory Map

29
4 Clock Management Unit (CMU)

32
- CMU/HOSC Description
  32
- Figure 2: ATJ2135 Clock Diagram
  33
- Figure 3: CMU Framework
  34
- Figure 4: SPECIAL CLK Framework
  35
- CMU/HOSC Register List
  36
  - Cmu_Corepll
    36
  - Table 3: CMU Base Address
    36
  - Table 4: HOSC/CMU Register Address
    36
  - Table 5: CMU_COREPLL Bit Field Description
    36
  - Cmu_Dsppll
    37
  - Cmu_Audiopll
    37
  - Table 6: CMU_DSPPLL Bit Field Description
    37
  - Table 7: CMU_AUDIOPLL Bit Field Description
    38
  - Cmu_Busclk
    39
  - Table 8: CMU_BUSCLK Bit Field Description
    39
  - Cmu_Sdrclk
    40
  - Cmu_Nandclk
    40
  - Table 9: CMU_SDRCLK Bit Field Description
    40
  - Cmu_Sdclk
    41
  - Cmu_Uartxclk
    41
  - Table 10: CMU_NANDCLK Bit Field Description
    41
  - Table 11: CMU_SDCLK Bit Field Description
    41
  - Cmu_Mhaclk
    42
  - Cmu_Dmaclk
    42
  - Table 12: Cmu_Uartxclk Bit Field Description
    42
  - Table 13: CMU_MHACLK Bit Field Description
    42
  - Table 14: CMU_DMACLK Bit Field Description
    42
  - Cmu_Fmclk
    43
  - Table 15: CMU_FMCLK Bit Field Description
    43
  - Cmu_Mcaclk
    44
  - Cmu_Devclken
    44
  - Table 16: CMU_MCACLK Bit Field Description
    44
  - Table 17: CMU_DEVCLKEN Bit Field Description
    44
  - Cmu_Devrst
    46
  - Table 18: CMU_DEVRST Bit Field Description
    46
- Rtc/Losc/Watch Dog/Timers Block Description
  47
- Rtc/Losc/Watch Dog Register List
  48
  - Figure 5: Watch Dog/Rtc/Timers Block Diagram
    48
  - Table 19: RTC Base Address
    48
  - Rtc_Ctl
    49
  - Table 20: HOSC/CMU Register Address
    49
  - Table 21: RTC_CTL Bit Field Description
    49
  - Rtc_Dhms
    50
  - Table 22: RTC_DHMS Bit Field Description
    50
  - Rtc_Dhmsalm
    51
  - Rtc_Ymd
    51
  - Table 23: RTC_YMD Bit Field Description
    51
  - Table 24: RTC_DHMSALM Bit Field Description
    51
  - Rtc_Wdctl
    52
  - Rtc_Ymdalm
    52
  - Table 25: RTC_YMDALM Bit Field Description
    52
  - Table 26: RTC_WDCTL Bit Field Description
    52
  - Rtc_T0Ctl
    53
  - Table 27: RTC_T0CTL Bit Field Description
    53
  - Rtc_T0
    54
  - Rtc_T1
    54
  - Rtc_T1Ctl
    54
  - Table 28: RTC_T0 Bit Field Description
    54
  - Table 29: RTC_T1CTL Bit Field Description
    54
  - Table 30: RTC_T1 Bit Field Description
    55
5 Interrupt Controller

56
6 PMU/DC-DC Converter

62
32 BIT RISC Core

69
8 SDRAM Interface

80
- SDRAM Interface Description
  80
- SDRAM Interface Register List
  80
  - Table 60: SDR Base Address
    80
  - Table 61: SDRAM Interface Configuration Registers
    80
  - Sdr_Ctl
    81
  - Table 62: SDR_CTL Bit Field Description
    81
  - Sdr_Cmd
    82
  - Sdr_En
    82
  - Table 63: SDR_EN Bit Field Description
    82
  - Table 64: SDR_CMD Bit Field Description
    82
  - Sdr_Stat
    83
  - Table 65: SDR_STAT Bit Field Description
    83
  - Sdr_Autorfc
    84
  - Sdr_Mode
    84
  - Table 66: SDR_AUTORFC Bit Field Description
    84
  - Table 67: SDR_MODE Bit Field Description
    84
  - Sdr_Mobile
    85
  - Table 68: SDR_MOBILE Bit Field Description
    85
9 SRAM on Chip

86
- Description
  86
- Register List
  86
10 Dma/Bus Arbiter

88
- Description
  88
- Register List
  88
24 BIT DSP Core

97
- Description
  97
- Register List
  97
  - Table 86: DSP Base Address
    97
  - Table 87: DSP Register Address
    97
  - Dsp_Hdr0
    98
  - Dsp_Hdr1
    98
  - Dsp_Hdr2
    98
  - Table 88: DSP_HDR0 Bit Field Description
    98
  - Table 89: DSP_HDR1 Bit Field Description
    98
  - Dsp_Hdr3
    99
  - Dsp_Hdr4
    99
  - Dsp_Hdr5
    99
  - Table 90: DSP_HDR2 Bit Field Description
    99
  - Table 91: DSP_HDR3 Bit Field Description
    99
  - Table 92: DSP_HDR4 Bit Field Description
    99
  - Table 93: DSP_HDR5 Bit Field Description
    99
  - Dsp_Ctl
    100
  - Dsp_Hsr6
    100
  - Dsp_Hsr7
    100
  - Table 94: DSP_HSR6 Bit Field Description
    100
  - Table 95: DSP_HSR7 Bit Field Description
    100
  - Table 96: DSP_CTL Bit Field Description
    100
12 Media Hardware Accelerator (MHA)

102
- Description
  102
- Figure 7: How to Use MHA in a System
  102
- Table 97: Functions and Application of MHA
  102
- Register List and Memory Map
  103
  - Mha_Ctl
    103
  - Table 98: MHA Base Address
    103
  - Table 99: MHA IO Registers
    103
  - Table 100: MHA Memory
    103
  - Table 101: MHA_CTL Bit Field Description
    103
  - Table 102: Q Table Mapping
    104
  - Table 103: B1/B2 Mapping
    104
  - Mha_Cfg
    105
  - Table 104: MHA_CFG Bit Field Description
    105
  - Mha_Dcscl01
    107
  - Mha_Dcscl23
    107
  - Mha_Dcscl45
    107
  - Table 105: MHA_DCSCL0 Bit Field Description
    107
  - Table 106: MHA_DCSCL1 Bit Field Description
    107
  - Mha_Dcscl67
    108
  - Mha_Qscl
    108
  - Table 107: MHA_DCSCL2 Bit Field Description
    108
  - Table 108: MHA_DCSCL3 Bit Field Description
    108
  - Table 109: MHA_QSCL Bit Field Description
    108
13 Motion Compensation Accelerator (MCA)

109
- Description
  109
- Register List and Memory Map
  109
  - Figure 8: Application Example of MCA
    109
  - Table 110: MCA Base Address
    109
  - Table 111: MCA IO Registers
    109
  - Table 112: MCA Memory
    109
  - Mca_Ctl
    110
  - Table 113: MCA_CTL Bit Field Description
    110
14 NAND FLASH Interface

112
- Description
  112
- Register List
  112
  - Table 114: NAND FLASH Block Base Address
    112
  - Table 115: NAND FLASH Register Address
    112
  - Nand_Ctl
    113
  - Table 116: NAND_CTL Bit Field Description
    113
  - Nand_Status
    115
  - Table 117: NAND_STATUS Bit Field Description
    115
  - Nand_Fifotim
    116
  - Table 118: NAND_FIFOTIM Bit Field Description
    116
  - Nand_Bytecnt
    117
  - Nand_Clkctl
    117
  - Table 119: NAND_CLKCTL Bit Field Description
    117
  - Table 120: NAND_BYTECNT Bit Field Description
    117
  - Nand_ Addrhi1234
    118
  - Nand_Addrlo1234
    118
  - Nand_Addrlo56
    118
  - Table 121: NAND_ADDRLO1234 Bit Field Description
    118
  - Table 122: NAND_ADDRLO56 Bit Field Description
    118
  - Table 123: NAND_ ADDRHI1234 Bit Field Description
    118
  - Nand_ Addrhi56
    119
  - Nand_Buf0
    119
  - Nand_Buf1
    119
  - Table 124: NAND_ ADDRHI56 Bit Field Description
    119
  - Table 125: NAND_BUF0 Bit Field Description
    119
  - Nand_Cmd
    120
  - Table 126: NAND_BUF1 Bit Field Description
    120
  - Table 127: NAND_CMD (General Mode) Bit Field Description
    120
  - Table 128: NAND_CMD (Spare Mode) Bit Field Description
    121
  - Nand_Eccctl
    123
  - Table 129: NAND_ECCCTL Bit Field Description
    123
  - Nand_Hamecc0
    124
  - Table 130: NAND_HAMECC0 Bit Field Description
    124
  - Nand_Hamecc1
    126
  - Table 131: NAND_HAMECC1 Bit Field Description
    126
  - Nand_Hamecc2
    127
  - Table 132: NAND_HAMECC2 Bit Field Description
    127
  - Nand_Hamcec
    128
  - Nand_Rse0
    128
  - Table 133: NAND_HAMCEC Bit Field Description
    128
  - Table 134: NAND_RSE0 Bit Field Description
    128
  - Nand_Rse1
    129
  - Nand_Rse2
    129
  - Table 135: NAND_RSE1 Bit Field Description
    129
  - Table 136: NAND_RSE2 Bit Field Description
    129
  - Nand_Rse3
    130
  - Nand_Rsps0
    130
  - Table 137: NAND_RSE3 Bit Field Description
    130
  - Figure 9: NAND_RSPS0 Parity
    131
  - Nand_Rsps1
    131
  - Nand_Rsps2
    131
  - Table 138: NAND_RSPS0 Bit Field Description
    131
  - Table 139: NAND_RSPS1 Bit Field Description
    131
  - Table 140: NAND_RSPS2 Bit Field Description
    131
  - Nand_Debug
    132
  - Nand_Fifodata
    132
  - Table 141: NAND_RSPS2 Bit Field Description
    132
  - Table 142: NAND_DEBUG Bit Field Description
    132
15 SD/MMC Interface

133
- Description
  133
- Register List
  133
  - Table 143: SD/MMC Block Base Address
    133
  - Table 144: SD/MMC Register Address
    133
  - Sd_Cmdrsp
    134
  - Sd_Ctl
    134
  - Table 145: SD_CTL Bit Field Description
    134
  - Sd_Rw
    135
  - Table 146: SD_CMDRSP Bit Field Description
    135
  - Table 147: SD_RW Bit Field Description
    135
  - Sd_Fifoctl
    136
  - Table 148: SD_FIFOCTL Bit Field Description
    136
  - Sd_Cmd
    137
  - Table 149: SD_CMD Bit Field Description
    137
  - Sd_Arg
    138
  - Sd_Crc7
    138
  - Sd_Rspbuf0
    138
  - Sd_Rspbuf1
    138
  - Table 150: SD_ARG Bit Field Description
    138
  - Table 151: SD_CRC7 Bit Field Description
    138
  - Table 152: SD_RSPBUF0 Bit Field Description
    138
  - Table 153: SD_RSPBUF1 Bit Field Description
    138
  - Sd_Dat
    139
  - Sd_Rspbuf2
    139
  - Sd_Rspbuf3
    139
  - Sd_Rspbuf4
    139
  - Table 154: SD_RSPBUF2 Bit Field Description
    139
  - Table 155: SD_RSPBUF3 Bit Field Description
    139
  - Table 156: SD_RSPBUF4 Bit Field Description
    139
  - Sd_Bytecnt
    140
  - Sd_Clk
    140
  - Table 157: SD_DAT Bit Field Description
    140
  - Table 158: SD_CLK Bit Field Description
    140
  - Table 159: SD_BYTECNT Bit Field Description
    140
16 YUV2RGB Interface

141
- Description
  141
- Register List
  141
  - Yuv2Rgb_Ctl
    141
  - Table 160: YUV2RGB Registers Block Base Address
    141
  - Table 161: YUV2RGB Registers Offset Address
    141
  - Table 162: YUV2RGB_CTL Bit Field Description
    142
  - Yu2Rgb_Dat
    144
  - Yuv2Rgb_Clkctl
    144
  - Yuv2Rgb_Framecount
    144
  - Table 163: YU2RGB_DAT Bit Field Description
    144
  - Table 164: YUV2RGB_CLKCTL Bit Field Description
    144
  - Table 165: Yuv2Rgb_Framecount Bit Field Description
    144
17 Usb2.0 Sie

146
- General Description
  146
18 I2C (2) Interface

147
- Description
  147
- Register List
  147
  - Figure 10: I2C Interface Timing
    147
  - Table 166: I2C Register Block Base Address
    147
  - Table 167: I2C Registers Offset Address
    147
  - I2Cx_Ctl
    148
  - Table 168: I2Cx_Ctl Bit Field Description
    148
  - I2Cx_Clkdiv
    149
  - I2Cx_Stat
    149
  - Table 169: I2Cx_Clkdiv Bit Field Description
    149
  - Table 170: I2Cx_Stat Bit Field Description
    149
  - I2Cx_Addr
    151
  - I2Cx_Dat
    151
  - Table 171: I2Cx_Addr Bit Field Description
    151
  - Table 172: I2Cx_Dat Bit Field Description
    152
19 UART Interface

153
- Description
  153
- Register List
  153
  - Table 173: UART Registers Block Base Address
    153
  - Table 174: UART Registers Offset Address
    153
  - Table 175: UART2_CTL Bit Field Description
    154
  - Uart2_Ctl
    154
  - Table 176: UART2_RXDAT Bit Field Description
    156
  - Table 177: UART2_TXDAT Bit Field Description
    156
  - Table 178: UART2_STAT Bit Field Description
    156
  - Uart2_Rxdat
    156
  - Uart2_Stat
    156
  - Uart2_Txdat
    156
20 IR Interface

158
- Description
  158
- Register List
  158
  - Table 179: IR Interface Modes
    158
  - Table 180: IR Registers Block Base Address
    158
  - Ir_Pl
    159
  - Ir_Rbc
    159
  - Table 181: IR Registers Offset Address
    159
  - Table 182: IR_PL Bit Field Description
    159
  - Table 183: IR_RBC Bit Field Description
    159
21 Key Scan

160
- Description
  160
- Figure 11: Max Key Scan Matrix in Parallel Mode
  160
- Figure 12: 8*8 Key Scan Matrix in Serial Mode
  161
- Figure 13: One Line Scan Timing
  162
- Figure 14: the Whole Key Scan Timing
  162
- Register List
  163
  - Key_Ctl
    163
  - Table 184: Key Scan Registers Block Base Address
    163
  - Table 185: Key Scan Registers Offset Address
    163
  - Table 186: KEY_CTL Bit Field Description
    163
  - Key_Dat0
    164
  - Table 187: KEY_DAT0 Bit Field Description
    164
  - Key_Dat1
    165
  - Key_Dat2
    165
  - Key_Dat3
    165
  - Table 188: KEY_DAT1 Bit Field Description
    165
  - Table 189: KEY_DAT2 Bit Field Description
    165
  - Table 190: KEY_DAT3 Bit Field Description
    165
22 GPIO and Multi-Function Configuration

166
- Description
  166
  - Gpio/Function Pin
    166
  - Multi-Function
    166
  - Pad with Built-In Resistance
    166
- Register List
  167
  - Gpio_Aouten
    167
  - Gpio_Ainen
    167
  - Table 191: GPIO Registers Block Base Address
    167
  - Table 192: GPIO Registers Offset Address
    167
  - Table 193: GPIO_AOUTEN Bit Field Description
    167
  - Table 194: GPIO_AINEN Bit Field Description
    167
  - Gpio_Adat
    168
  - Gpio_Bouten
    168
  - Gpio_Binen
    168
  - Table 195: GPIO_ADAT Bit Field Description
    168
  - Table 196: GPIO_BOUTEN Bit Field Description
    168
  - Table 197: GPIO_BINEN Bit Field Description
    168
  - Gpio_Bdat
    169
  - Gpio_Mfctl0
    169
  - Table 198: GPIO_BDAT Bit Field Description
    169
  - Table 199: GPIO_MFCTL0 Bit Field Description
    169
  - Gpio_Mfctl1
    170
  - Table 200: GPIO_MFCTL1 Bit Field Description
    171
  - Pad_Drv
    172
  - Table 201: PAD Driver Bit Field Description
    172
23 DAC and Headphone Driver

174
- Description
  174
- Figure 15: DAC Block Diagram
  174
- Register List
  175
  - Figure 16: ADDA Analog Diagram
    175
  - Table 202: DAC Registers Block Base Address
    175
  - Table 203: DAC Registers Offset Address
    175
  - Dac_Ctl
    176
  - Table 204: DAC_CTL Bit Field Description
    176
  - Dac_Fifoctl
    177
  - Table 205: DAC_FIFOCTL Bit Field Description
    177
  - Dac_Analog
    179
  - Dac_Dat
    179
  - Dac_Debug
    179
  - Table 206: DAC_DAT Bit Field Description
    179
  - Table 207: Dac_Debug Bit Field Description
    179
  - Table 208: Dac_Analog Bit Field Description
    179
24 Adc

182
- Description
  182
- Register List
  182
  - Adc_Ctl
    182
  - Table 209: ADC Registers Block Base Address
    182
  - Table 210: ADC Registers Offset Address
    182
  - Table 211: ADC_CTL Bit Field Description
    182
  - Adc_Fifoctl
    184
  - Table 212: ADC_FIFOCTL Bit Field Description
    184
  - Adc_Dat
    185
  - Adc_Analog
    186
  - Table 213: ADC_DAT Bit Field Description
    186
  - Table 214: Adc_Analog Bit Field Description
    186
  - Adc_Debug
    187
  - Table 215: Adc_Debug Bit Field Description
    187

Advertisement

Advertisement

Related Products

Actions Categories

Control Unit Microcontrollers

More Actions Manuals