Abov MC96F6332A Manuals

Manuals and User Guides for Abov MC96F6332A. We have 1 Abov MC96F6332A manual available for free PDF download: User Manual

Abov MC96F6332A User Manual (281 pages)

CMOS single-chip 8-bit MCU with 12-bit A/D converter and LCD driver

Brand: Abov | Category: Microcontrollers | Size: 3 MB

Revision History
2
Overview
3
Description
3
Features
4
Development Tools
5
Compiler
5
Ocd(On-Chip Debugger) Emulator and Debugger
5
Programmer
7
MTP Programming
9
Overview
9
On-Board Programming
9
Circuit Design Guide
9
Block Diagram
11
Pin Assignment
12
Package Diagram
16
Pin Description
21
Port Structures
26
General Purpose I/O Port
26
External Interrupt I/O Port
27
Electrical Characteristics
28
Absolute Maximum Ratings
28
Recommended Operating Conditions
28
A/D Converter Characteristics
29
Power-On Reset Characteristics
29
Low Voltage Reset and Low Voltage Indicator Characteristics
30
High Internal RC Oscillator Characteristics
30
Internal Watch-Dog Timer RC Oscillator Characteristics
31
LCD Voltage Characteristics
31
DC Characteristics
32
AC Characteristics
33
SPI0/1/2 Characteristics
34
UART0/1 Characteristics
35
I2C0/1 Characteristics
36
Data Retention Voltage in Stop Mode
37
Internal Flash Rom Characteristics
38
Input/Output Capacitance
38
Main Clock Oscillator Characteristics
39
Sub Clock Oscillator Characteristics
40
Main Oscillation Stabilization Characteristics
41
Sub Oscillation Characteristics
41
Operating Voltage Range
42
Recommended Circuit and Layout
43
Recommended Circuit and Layout with SMPS Power
44
Typical Characteristics
45
Memory
48
Program Memory
48
Data Memory
50
External Data Memory
52
SFR Map
53
SFR Map Summary
53
SFR Map
55
SFR Map
60
O Ports
62
I/O Ports
62
Port Register
62
Data Register (Px)
62
Direction Register (Pxio)
62
Pull-Up Resistor Selection Register (Pxpu)
62
Open-Drain Selection Register (Pxod)
62
Bounce Enable Register (Pxdb)
62
Port Function Selection Register (Pxfsr)
63
Register Map
63
P0 Port
64
P0 Port Description
64
Register Description for P0
64
P1 Port
68
P1 Port Description
68
Register Description for P1
68
P2 Port
72
P2 Port Description
72
Register Description for P2
72
P3 Port
75
P3 Port Description
75
Register Description for P3
75
P4 Port
77
P4 Port Description
77
Register Description for P4
77
P5 Port
79
P5 Port Description
79
Register Description for P5
79
Interrupt Controller
81
Overview
81
External Interrupt
83
Block Diagram
84
Interrupt Vector Table
85
Interrupt Sequence
86
Effective Timing after Controlling Interrupt Bit
87
Multi Interrupt
88
Interrupt Enable Accept Timing
89
Interrupt Service Routine Address
89
Saving/Restore General-Purpose Registers
89
Interrupt Timing
90
Interrupt Register Overview
90
Interrupt Enable Register (IE, IE1, IE2, IE3)
90
Interrupt Priority Register (IP, IP1)
90
External Interrupt Flag Register (EIFLAG0, EIFLAG1)
91
External Interrupt Polarity Register (EIPOL0L, EIPOL0H, EIPOL1)
91
Register Map
91
Interrupt Register Description
91
Register Description for Interrupt
92
Peripheral Hardware
98
Clock Generator
98
Overview
98
Block Diagram
99
Register Map
100
Clock Generator Register Description
100
Register Description for Clock Generator
100
Basic Interval Timer
103
Overview
103
Block Diagram
103
Register Map
103
Basic Interval Timer Register Description
104
Register Description for Basic Interval Timer
104
Watch Dog Timer
105
Overview
105
WDT Interrupt Timing Waveform
105
Block Diagram
106
Register Map
106
Watch Dog Timer Register Description
106
Register Description for Watch Dog Timer
107
Watch Timer
108
Overview
108
Block Diagram
108
Register Map
109
Watch Timer Register Description
109
Register Description for Watch Timer
109
Timer 0
111
Overview
111
8-Bit Timer/Counter Mode
112
8-Bit PWM Mode
113
8-Bit Capture Mode
115
Block Diagram
117
Register Map
117
Timer/Counter 0 Register Description
117
Register Description for Timer/Counter 0
118
Timer 1
120
Overview
120
16-Bit Timer/Counter Mode
120
16-Bit Capture Mode
122
16-Bit PPG Mode
124
Block Diagram
126
Register Map
126
Timer/Counter 1 Register Description
127
Register Description for Timer/Counter 1
127
Timer 2
130
Overview
130
16-Bit Timer/Counter Mode
131
16-Bit Capture Mode
133
16-Bit PPG Mode
135
Block Diagram
137
Register Map
137
Timer/Counter 2 Register Description
138
Register Description for Timer/Counter 2
138
Timer 3, 4
141
Overview
141
8-Bit Timer/Counter 3, 4 Mode
142
16-Bit Timer/Counter 3 Mode
143
8-Bit Timer 3, 4 Capture Mode
144
16-Bit Timer 3 Capture Mode
146
10-Bit Timer 4 PWM Mode
147
Block Diagram
157
Register Map
159
Timer/Counter 3 Register Description
160
Register Description for Timer/Counter 3
160
Timer/Counter 4 Register Description
162
Register Description for Timer/Counter 4
162
Buzzer Driver
170
Overview
170
Block Diagram
170
Register Map
171
Buzzer Driver Register Description
171
Register Description for Buzzer Driver
171
Spi 2
172
Overview
172
Block Diagram
172
Data Transmit / Receive Operation
173
SS2 Pin Function
173
SPI 2 Timing Diagram
174
Register Map
175
SPI 2 Register Description
175
Register Description for SPI 2
175
12-Bit A/D Converter
178
Overview
178
Conversion Timing
178
Block Diagram
179
ADC Operation
180
Register Map
181
ADC Register Description
181
Register Description for ADC
182
Usi (Usart + Spi + I2C)
184
Overview
184
Usin UART Mode
185
Usin UART Block Diagram
186
Usin Clock Generation
187
Usin External Clock (Sckn)
188
Usin Synchronous Mode Operation
188
Usin UART Data Format
189
Usin UART Parity Bit
190
Usin UART Transmitter
190
Usin UART Sending TX Data
190
Usin UART Transmitter Flag and Interrupt
190
Usin UART Parity Generator
191
Usin UART Disabling Transmitter
191
Usin UART Receiver
191
Usin UART Receiving RX Data
191
Usin UART Receiver Flag and Interrupt
192
Usin UART Parity Checker
192
Usin UART Disabling Receiver
192
Usin Asynchronous Data Reception
193
Usin SPI Mode
195
Usin SPI Clock Formats and Timing
195
Usin SPI Block Diagram
198
Usin I2C Mode
199
Usin I2C Bit Transfer
199
Usin I2C Start / Repeated Start / Stop
200
Usin I2C Data Transfer
200
Usin I2C Acknowledge
201
Usin I2C Synchronization / Arbitration
201
Usin I2C Operation
202
Usin I2C Master Transmitter
203
Usin I2C Master Receiver
205
Usin I2C Slave Transmitter
207
Usin I2C Slave Receiver
208
Usin I2C Block Diagram
209
Register Map
210
Usin Register Description
210
Register Description for Usin
211
Baud Rate Setting (Example)
220
LCD Driver
221
Overview
221
LCD Display RAM Organization
222
LCD Signal Waveform
223
LCD Voltage Dividing Resistor Connection
227
Block Diagram
229
Register Map
229
LCD Driver Register Description
229
Register Description for LCD Driver
230
Power down Operation
233
Overview
233
Peripheral Operation in IDLE/STOP Mode
233
IDLE Mode
234
STOP Mode
235
Release Operation of STOP Mode
236
Register Map
237
Power down Operation Register Description
237
Register Description for Power down Operation
237
Reset
238
Overview
238
Reset Source
238
RESET Block Diagram
238
RESET Noise Canceller
239
Power on RESET
239
External RESETB Input
242
Brown out Detector Processor
243
LVI Block Diagram
245
Register Map
245
Reset Operation Register Description
245
Register Description for Reset Operation
246
On-Chip Debug System(MC96F6432 ONLY)
249
Overview
249
Description
249
Feature
250
Two-Pin External Interface
251
Basic Transmission Packet
251
Packet Transmission Timing
252
Data Transfer
252
Bit Transfer
252
Start and Stop Condition
253
Acknowledge Bit
253
Connection of Transmission
254
Flash Memory
255
Overview
255
Description
255
Flash Program ROM Structure
256
Register Map
257
Register Description for Flash Memory Control and Status
257
Register Description for Flash
258
Serial In-System Program (ISP) Mode
260
Protection Area (User Program Mode)
260
Erase Mode
261
Write Mode
262
Protection for Invalid Erase/Write
264
Flow of Protection for Invalid Erase/Write
266
Read Mode
267
Code Write Protection Mode
267
Configure Option
268
Configure Option Control
268
Appendix
269

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Abov MC96F6332A User Manual (281 pages)

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