Abov MC96F6432SQ Manuals

Manuals and User Guides for Abov MC96F6432SQ. We have 1 Abov MC96F6432SQ manual available for free PDF download: User Manual

Abov MC96F6432SQ User Manual

Abov MC96F6432SQ User Manual (283 pages)

CMOS single-chip 8-bit MCU with 12-bit A/D converter and LCD driver

Brand: Abov | Category: Microcontrollers | Size: 3 MB

Table of Contents

Revision History

2
1 Overview

3
- Description
  3
- Features
  4
- Development Tools
  5
- MTP Programming
  8
  - Overview
    8
  - On-Board Programming
    8
    
    Circuit Design Guide
    8
2 Block Diagram

10
3 Pin Assignment

11
4 Package Diagram

15
5 Pin Description

20
6 Port Structures

25
- General Purpose I/O Port
  25
- External Interrupt I/O Port
  26
7 Electrical Characteristics

27
8 Memory

47
- Program Memory
  47
- Data Memory
  49
- External Data Memory
  51
- SFR Map
  52
  - SFR Map Summary
    52
  - SFR Map
    54
  - SFR Map
    59
9 O Ports

61
- I/O Ports
  61
- Port Register
  61
- P0 Port
  63
  - P0 Port Description
    63
  - Register Description for P0
    63
- P1 Port
  67
  - P1 Port Description
    67
  - Register Description for P1
    67
- P2 Port
  71
  - P2 Port Description
    71
  - Register Description for P2
    71
- P3 Port
  74
  - P3 Port Description
    74
  - Register Description for P3
    74
- P4 Port
  76
  - P4 Port Description
    76
  - Register Description for P4
    76
- P5 Port
  78
  - P5 Port Description
    78
  - Register Description for P5
    78
10 Interrupt Controller

80
11 Peripheral Hardware

97
- Clock Generator
  97
  - Overview
    97
  - Block Diagram
    98
  - Register Map
    99
  - Clock Generator Register Description
    99
  - Register Description for Clock Generator
    99
- Basic Interval Timer
  101
  - Overview
    101
  - Block Diagram
    101
  - Register Map
    101
  - Basic Interval Timer Register Description
    102
  - Register Description for Basic Interval Timer
    102
- Watch Dog Timer
  103
  - Overview
    103
  - WDT Interrupt Timing Waveform
    103
  - Block Diagram
    104
  - Register Map
    104
  - Watch Dog Timer Register Description
    104
  - Register Description for Watch Dog Timer
    105
- Watch Timer
  106
  - Overview
    106
  - Block Diagram
    106
  - Register Map
    107
  - Watch Timer Register Description
    107
  - Register Description for Watch Timer
    107
- Timer 0
  109
  - Overview
    109
  - 8-Bit Timer/Counter Mode
    110
  - 8-Bit PWM Mode
    111
  - 8-Bit Capture Mode
    113
  - Block Diagram
    115
  - Register Map
    115
  - Timer/Counter 0 Register Description
    115
  - Register Description for Timer/Counter 0
    116
- Timer 1
  118
  - Overview
    118
  - 16-Bit Timer/Counter Mode
    118
  - 16-Bit Capture Mode
    120
  - 16-Bit PPG Mode
    122
  - Block Diagram
    124
  - Register Map
    124
  - Timer/Counter 1 Register Description
    125
  - Register Description for Timer/Counter 1
    125
- Timer 2
  128
  - Overview
    128
  - 16-Bit Timer/Counter Mode
    129
  - 16-Bit Capture Mode
    131
  - 16-Bit PPG Mode
    133
  - Block Diagram
    135
  - Register Map
    135
  - Timer/Counter 2 Register Description
    136
  - Register Description for Timer/Counter 2
    136
- Timer 3, 4
  139
  - Overview
    139
  - 8-Bit Timer/Counter 3, 4 Mode
    140
  - 16-Bit Timer/Counter 3 Mode
    141
  - 8-Bit Timer 3, 4 Capture Mode
    142
  - 16-Bit Timer 3 Capture Mode
    144
  - 10-Bit Timer 4 PWM Mode
    145
  - Block Diagram
    155
  - Register Map
    157
  - Timer/Counter 3 Register Description
    158
  - Register Description for Timer/Counter 3
    158
  - Timer/Counter 4 Register Description
    160
  - Register Description for Timer/Counter 4
    160
- Buzzer Driver
  168
  - Overview
    168
  - Block Diagram
    168
  - Register Map
    169
  - Buzzer Driver Register Description
    169
  - Register Description for Buzzer Driver
    169
- Spi 2
  170
  - Overview
    170
  - Block Diagram
    170
  - Data Transmit / Receive Operation
    171
  - SS2 Pin Function
    171
  - SPI 2 Timing Diagram
    172
  - Register Map
    173
  - SPI 2 Register Description
    173
  - Register Description for SPI 2
    173
- 12-Bit A/D Converter
  176
  - Overview
    176
  - Conversion Timing
    176
  - Block Diagram
    177
  - ADC Operation
    178
  - Register Map
    179
  - ADC Register Description
    179
  - Register Description for ADC
    180
- Usi (Usart + Spi + I2C)
  182
  - Overview
    182
  - Usin UART Mode
    183
  - Usin UART Block Diagram
    184
  - Usin Clock Generation
    185
  - Usin External Clock (Sckn)
    186
  - Usin Synchronous Mode Operation
    186
  - Usin UART Data Format
    187
  - Usin UART Parity Bit
    188
  - Usin UART Transmitter
    188
    
    Usin UART Sending TX Data
    188
    
    Usin UART Transmitter Flag and Interrupt
    188
    
    Usin UART Parity Generator
    189
    
    Usin UART Disabling Transmitter
    189
  - Usin UART Receiver
    189
    
    Usin UART Receiving RX Data
    189
    
    Usin UART Receiver Flag and Interrupt
    190
    
    Usin UART Parity Checker
    190
    
    Usin UART Disabling Receiver
    190
    
    Usin Asynchronous Data Reception
    191
  - Usin SPI Mode
    193
  - Usin SPI Clock Formats and Timing
    193
  - Usin SPI Block Diagram
    196
  - Usin I2C Mode
    197
  - Usin I2C Bit Transfer
    197
  - Usin I2C Start / Repeated Start / Stop
    198
  - Usin I2C Data Transfer
    198
  - Usin I2C Acknowledge
    199
  - Usin I2C Synchronization / Arbitration
    199
  - Usin I2C Operation
    200
    
    Usin I2C Master Transmitter
    201
    
    Usin I2C Master Receiver
    203
    
    Usin I2C Slave Transmitter
    205
    
    Usin I2C Slave Receiver
    206
  - Usin I2C Block Diagram
    207
  - Register Map
    208
  - Usin Register Description
    208
  - Register Description for Usin
    209
  - Baud Rate Setting (Example)
    218
- LCD Driver
  219
  - Overview
    219
  - LCD Display RAM Organization
    220
  - LCD Signal Waveform
    221
  - LCD Voltage Dividing Resistor Connection
    225
  - Block Diagram
    227
  - Register Map
    227
  - LCD Driver Register Description
    227
  - Register Description for LCD Driver
    228
12 Power down Operation

231
- Overview
  231
- Peripheral Operation in IDLE/STOP Mode
  231
- IDLE Mode
  232
- STOP Mode
  233
- Release Operation of STOP Mode
  234
- Register Map
  235
- Power down Operation Register Description
  235
- Register Description for Power down Operation
  235
13 Reset

236
- Overview
  236
- Reset Source
  236
- RESET Block Diagram
  236
- RESET Noise Canceller
  237
- Power on RESET
  237
- External RESETB Input
  240
- Brown out Detector Processor
  241
- LVI Block Diagram
  243
- Register Map
  243
- Reset Operation Register Description
  243
- Register Description for Reset Operation
  244
14 On-Chip Debug System(MC96F6432 ONLY)

247
- Overview
  247
  - Description
    247
  - Feature
    248
- Two-Pin External Interface
  249
  - Basic Transmission Packet
    249
  - Packet Transmission Timing
    250
    
    Data Transfer
    250
    
    Bit Transfer
    250
    
    Start and Stop Condition
    251
    
    Acknowledge Bit
    251
  - Connection of Transmission
    252
15 Flash Memory

253
- Overview
  253
  - Description
    253
  - Flash Program ROM Structure
    254
  - Register Map
    255
  - Register Description for Flash Memory Control and Status
    255
  - Register Description for Flash
    256
  - Serial In-System Program (ISP) Mode
    258
  - Protection Area (User Program Mode)
    258
  - Erase Mode
    259
  - Write Mode
    260
  - Protection for Invalid Erase/Write
    262
    
    Flow of Protection for Invalid Erase/Write
    264
  - Read Mode
    265
  - Code Write Protection Mode
    265
16 Configure Option

266
- Configure Option Control
  266
17 Appendix

267
- Instruction Table
  267
- Instructions on How to Use the Input Port
  271
- ESD Test Method
  273
- Flash Protection for Invalid Erase/Write
  275

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