abaco systems PCI-5565PIORC Manuals

Manuals and User Guides for abaco systems PCI-5565PIORC. We have 1 abaco systems PCI-5565PIORC manual available for free PDF download: Hardware Reference Manual

abaco systems PCI-5565PIORC Hardware Reference Manual (66 pages)

Ultrahigh Speed FiberOptic Reflective Memory with Interrupts

Brand: abaco systems | Category: PCI Card | Size: 0 MB

Figure 1 Block Diagram of PCI-5565PIORC
8
Figure 2 Typical Reflective Memory Network
9
Table of Contents
13
Handling and Installation
17
Unpacking Procedures
17
Handling Precaution
17
Switch S1 and S2 Configuration
18
Before Installation Switch S1 and S2 Configuration
18
Table 1-1 Example Node ID Switch S2 RFM-5565
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Table 1-2 Switch S1 Configuration RFM-5565
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Table 1-3 S1 Memory Size
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Figure 1-1 S1 and S2 Location PCI-5565PIORC
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Physical Installation
21
Figure 1-2 Installing the PCI-5565PIORC
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Front Panel Description
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Figure 1-3 Front Panel of PCI-5565PIORC
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LED Description
23
Cable Configuration
23
Connector Specification (Singlemode and Multimode)
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Table 1-4 LED Descriptions
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Table 1-5 Cable Specifications for Multimode and Singlemode
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Figure 1-4 LC Type Fiber-Optic Cable Connector
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Figure 1-5 Example: Six Node Ring Connectivity PCI-5565PIORC
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Theory of Operation
25
Basic Operation
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Front Bezel LED Indicators
25
RFM-5565 Register Sets
26
Reflective Memory RAM
26
Interrupt Circuits
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Figure 2-1 Interrupt Circuitry Block Diagram
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Network Interrupts
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Redundant Transfer Mode of Operation
29
Rogue Packet Removal Operation
30
Programming
31
PCI Configuration Registers
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Table 3-1 PCI Configuration Registers
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Table 3-2 PCI Configuration ID Registers
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Table 3-3 PCI Command Register
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Table 3-4 PCI Status Register
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Table 3-5 PCI Revision ID Register
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Table 3-6 PCI Class Code Register
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Table 3-7 PCI Cache Line Size Register
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Table 3-8 PCI Latency Timer Register
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Table 3-9 PCI Header Type Register
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Table 3-10 PCI Built-In Self Test Register
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Table 3-11 PCI Base Address Register 0 for Access to Local Configuration Registers
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Table 3-12 PCI Base Address Register 1 for Access to Local Configuration Registers
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Table 3-13 PCI Base Address Register 2 for Access to RFM Control and Status Registers
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Table 3-14 PCI Base Address Register 3 for Access to Reflective Memory
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Table 3-15 PCI Base Address Register 4
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Table 3-16 PCI Base Address Register 5
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Table 3-17 PCI Cardbus CIS Pointer Register
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Table 3-18 PCI Subsystem Vendor ID Register
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Table 3-19 PCI Subsystem ID Register
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Table 3-20 PCI Expansion ROM Base Register
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Table 3-21 PCI Capability Pointer Register
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Table 3-22 PCI Interrupt Line
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Table 3-23 PCI Interrupt Pin
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Table 3-24 PCI Min_Gnt
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Table 3-25 PCI Max_Lat
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Local Configuration Registers
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Table 3-26 Local Configuration and DMA Control Registers
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Table 3-27 Mode/Dma Arbitration Register
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Table 3-28 Big/Little Endian Descriptor Register
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Table 3-29 Interrupt Control and Status Register
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Table 3-30 INTCSR Interrupt Enables
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Table 3-31 INTCSR Interrupt Status
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Table 3-32 PCI Core/Features Revision ID
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Table 3-33 DMA Channel 0 Mode Register
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Table 3-34 DMA Channel 0 PCI Address Register
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Table 3-35 DMA Channel 0 Local Address Register
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Table 3-36 DMA Channel 0 Transfer Size (Bytes) Register
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Table 3-37 DMA Channel 0 Descriptor Pointer Register
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Table 3-38 DMA Channel 0 Command/Status Register
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Table 3-39 DMA Channel 0 PCI Dual Address Cycles Upper Address
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Table 3-40 PCI PIO Direct Slave Local Address Range
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Table 3-41 PCI PIO Direct Slave Local Base Address (Remap)
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RFM Control and Status Registers
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Table 3-42 Memory Map of the Local Control and Status Registers
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Board Revision Register
49
Board ID Register
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Board Revision Build Register
49
Node ID Register
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Local Control and Status Register 1
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Table 3-43 Local Control and Status Register 1
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Table 3-44 PCI PIO Window Sizes
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Table 3-45 Config 1 and Config 0 Memory Size
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Table 3-46 Offset 1 and Offset 0
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Local Interrupt Control Registers
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Table 3-47 Local Interrupt Status Register
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Network Target Data Register
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Network Target Node Register
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Network Interrupt Command Register
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Table 3-48 Local Interrupt Enable Register
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Interrupt 1 Sender Data FIFO
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Interrupt 1 Sender ID FIFO
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Interrupt 2 Sender Data FIFO
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Table 3-49 Network Interrupt Command Register
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Interrupt 2 Sender ID FIFO
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Interrupt 3 Sender Data FIFO
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Interrupt 3 Sender ID FIFO
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Interrupt 4 Sender Data FIFO
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Interrupt 4 Sender ID FIFO
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Figure 3-1 Block Diagram of the Network Interrupt Reception Circuitry
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Example of a Block DMA Operation for RFM-5565
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Table 3-50 DMA Registers
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Example of a Scatter-Gather DMA Operation for RFM-5565
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Table 3-51 DMA Channel 0 Mode Settings
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Example of a PCI PIO Sliding Window Operation for RFM-5565
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Table 3-52 PCI PIO Window Selections
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Example of Network Interrupt Handling
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Setup
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Servicing Network Interrupts
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abaco systems PCI-5565PIORC Hardware Reference Manual (66 pages)

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