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4. TROUBLE SHOOTING
4.9.2. Checking PLL Control signals
Checking Points
TP1 (RF_EN)
U402
Figure 5. Transceiver
RF Transceiver Circuit Diagram
RF Transceiver Circuit Diagram
F
E
2
3
3
V
B
A I
S
3
4
V
D
D
T
X
1
V
5
V
D
D
R
X
2
V
8
3
5
2
T
X
1
V
D
D
R
X
1
V
5
U
4
0
2
3
6
1
T
X
2
V
C
O
_
R
C
P
M
B
6
2
7
2
3
7
1
V
D
D
T
X
2
V
8
V
D
D
V
C
O
2
V
8
3
8
1
V
D
D
M
X I
2
V
8
E
N
3
9
1
G
N
D
3
V
D
D
X
O
2
V
8
4
0
1
F
S
Y
S
1
1
G
N
D
4
G
N
D
1
4
1
1
RF Transceiver Circuit Diagram
LGE Internal Use Only
TP3 (RF_CLK)
TP2 (RF_DATA)
2
V
8
5
_
V
R
F
2
V
8
5
_
V
R
F
1
V
5
_
V
R
F
C
4
3
1
C
4
3
2
C
4
3
3
0
1 .
u
0
1 .
u
0
1 .
u
C
4
3
4
0
1 .
u
C
4
3
5
0
TP1
R
4
0
7
4
7
n
9
8
8
2
0
7
6
C
4
5
4
1
0
0
3
X
4
0
0
N
X
3
2
2
5
S
A
4
3
G
N
D
2
H
O
T
2
1
2
H
O
T
1
G
N
D
1
2
6
M
H
z
I S
M
1
_
B
T
_
C
L
K
TP3
2
6
M
_
O
U
T
_
T
E
S
T
TP2
R
F
_
C
L
K
R
F
_
D
A
Q
X
Q
X I
I
Checking Flow
EN Signal(TP1) is OK ?
Yes
DA(Data,TP2) is Normal ?
Yes
CLK(Clock,TP3) is Normal ?
Yes
Control Signal is OK.
See next page to check
Mobile SW & FEM.
RF_DATA(TP3)
RF_CLK(TP2)
R
F
_
E
N
3
6
2
6
M
H
Z
_
M
C
L
K
0
p
RF_EN(TP1)
Figure 7. PLL Control Waveform
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Copyright © 2008 LG Electronics. Inc. All right reserved.
No
Check U402
Check U402
No
No
Check U402
Waveform
Only for training and service purposes
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Troubleshooting
