Circuit Description - Vertex Standard VX-6000L Service Manual

Transceiver functions, such as PLL synthesizer
settings and channel programming, are controlled
via the microprocessor unit (MPU). Reception and
transmission are switched by "RX" and "TX" lines,
also controlled from the MPU.
Signal Path Overview
The receiver uses double-conversion superhet-
erodyne circuitry, with a 17.7 MHz 1st IF and 450
kHz 2nd IF. The 1st LO, produced by a PLL synthe-
sizer, yields the 17.7 MHz 1st IF. The 2nd LO uses a
17.25 MHz (17.7 MHz - 450 kHz) signal generated
by a crystal oscillator. The 2nd mixer and other cir-
cuits use a custom IC to convert and amplify the 2nd
IF, and detect FM to obtain demodulated signals.
During transmit, the PLL synthesizer oscillates at
the desired frequency directly, for amplification to
obtain RF power output. During transmit, voice
modulation and CTCSS (or DCS) modulation are
applied to this synthesizer. Transceiver functions,
such as TX/RX control, PLL synthesizer settings, and
channel programming, are controlled using the
MPU.
Receiver
Incoming RF signals from the antenna connector
are delivered to the PA Unit, and pass through a
low-pass filter (LPF) network consisting of coils
L6011, L6010, and L6009, capacitors C6047, C6045,
C6044, C6075, C6043, C6042 and C6074, and anten-
na switching relay RL6001 for delivery to the receiver
front end in the MAIN Unit.
Signals within the frequency range of the trans-
ceiver are then passed through a varactor-tuned
band-pass filter consisting of T1001/T1002/T1003 and
T 1 0 0 4 b e f o r e R F a m p l i f i c a t i o n b y Q 1 0 0 6
(GN010100R).
The amplified RF is then band-pass filtered again
by varactor-tuned resonators T1001, T1002, T1003
and T1004 to ensure pure in-band input to the 1st
mixer 1040 (SPM5001).
Buffered output from the VCO Unit is amplified
by Q1021 (2SC5107) and low-pass filtered by L1030,
L1020 and C1161, C1152, C1143 to provide a pure
1st local signal between 54.7 and 67.7 MHz for input
to the 1st mixer.
The 17.7 MHz 1st mixer product then passes
through dual monolithic crystal filters XF1001 and
XF1002 (12 kHz BW), and is amplified by Q1035
(2SC4215) and delivered to the input of the FM IF
subsystem IC Q1034 (TA31136FN). This IC contains
the 2nd mixer, 2nd local oscillator, limiter amplifi-
er, FM detector, noise amplifier, and squelch gate.
The 2nd LO in the IF-IC is produced from crystal
X1001 (17.25 MHz), and the 1st IF is converted to

Circuit Description

450 kHz by the 2nd mixer and stripped of unwant-
ed components by ceramic filter CF1001. After pass-
ing through a limiter amplifier, the signal is demod-
ulated by the FM detector.
Demodulated receive audio from the IF-IC is
amplified by Q2019 (CXA1846N). After volume ad-
justment by the AF power amplifier Q2018
(TDA7240AV), the audio signal is passed to the
speaker jack or the internal 4-Ohm loudspeaker.
PLL Synthesizer
The 1st LO, a PLL synthesizer, maintains stabili-
ty using a 17.25 MHz reference signal from crystal
X1001. PLL synthesizer IC Q1029 (SA7025DK) con-
sists of a prescaler, reference counter, swallow
counter, programmable counter, a serial data input
port to set these counters based on the external data,
a phase comparator, and charge pump. The PLL-IC
divides the 17.25 MHz reference signal by 1725 us-
ing the reference counter (10.0 kHz comparison fre-
quency). The phase detector comparison frequency
is designed to be two times the channel spacing (5
kHz). The VCO output is divided by the prescaler,
swallow counter and programmable counter. These
two signals are compared by the phase comparator
and sent to the charge pump. A voltage proportion-
al to their phase difference is delivered to the low-
pass filter circuit, then fed back to the VCO as a volt-
age with phase error, controlling and stabilizing the
oscillating frequency. This synthesizer also operates
as a modulator during transmit.
The RX-VCO is composed of Q1015 (2SK508) and
D1016/D1017 (HVU306AX2), and oscillates be-tween
54.7 MHz and 67.7 MHz according to the pro-
grammed receiving frequency. And the TX-VCO is
comprised of Q1016 (2SC4226) and D1012, D1013,
D1014, D1015 (HVU300AX4), and oscillates between
37.0 MHz and 50.0 MHz according to the pro-
grammed transmit frequency. The VCO output pass-
es through buffer amplifier Q1021 (2SC5107), and
a portion is fed to the buffer amplifier Q1023
(2SC4215) of the PLL IC, and at the same time am-
plified by Q1027 (2SC5415) to obtain stable output.
The VCO DC supply is regulated by Q1007
(2SC4154E). Synthesizer output is fed to the 1st mix-
er by diode switch D1022 (1SS321) during receive,
and for transmit. The reference oscillator feeds the
PLL synthesizer, and is composed of crystal X1001
(17.25 MHz), the temperature compensation circuit
which includes D1028 (MC2850) ,D1026(HVU306A)
and thermostats TH1001 and TH1002, and transmit
(DCS) modulation circuit D1025, D1029(HVU306A
X2).
4-1