LG RCT689H Service Manual page 151

• Block Diagram
SH6
INPUT Block
AIN
BIN
CIN
DIN
AAF
INPUT
S/H
Buffer
EIN
FIN
GIN
GIN
SRFMA
SRFMB
SRFMC
SRFMD
SH4
SH1
From LOGIC
VREF25
HDVREF
GATE
VHALF
VREF
To
VREF08
Each Block
VREF
GATE
Block
Block
CBDOF
CBDOS
ALL
SW
Sum
RFA
RFB
RFEQ Block
From
P00
FEP LOGIC
P01
P02
SRF/P0/PI0
P03
Block
P04
P05
P06
PI01 PI03 EQOUTA EQOUTB
PI00
PIo2 PI04
STMD STMDN
STMOUT SE01
COMP.
SAINL
ENC Block
SBINL
SCINL
M
VGA/Bypass
MPX
SDINL
P &
(SE01)
offset DAC
X
SEINL
M
SFINL
VGA/
P
Bypass
SGINL
X
SHINL
MPX Block
SDPDTEP
SDPDTEN
DPD TE
SPLAOUT
Dtetction
SPLBOUT
COMP.
DPD Block
TCOP
TCO
TC/TI TCON
Dtetction
TIOP
TIO
TION
BDO Block
SBDOAS MPX
PK
VGA
COMP.
ENV
Level
LPF
Shift
VGA
RF Gene Block
EQ AMP
CLMP
OFST HPF
FLTAMP RFIN2 RFOUT
RFIN1
SE02
CTC1
TEC Block
SPLAOUT
Input
select
VGA
SW
VGA
SPLBOUT
WBL/LPP Block
SRFMA
VGA
S/H
SRFMD
SRFMB
S/H
VGA
SRFMC
SLP14
MPX
SLP23
(SE01)
MPX
OPC & ASENV
Block
MPX
VGA
LPF
PK
VGA
ENV
ATT
PK
ENV
COMP.
JLINE Block
To
Each Block
JLINE
From LOGIC
RF Gene Block
To
LPC Block
LPCDAC
LPC
Block
LOGIC
To
Each Block
FEP
To MFX
LOGIC
IREF
RSEN
SDAT
BDO SEN LSDAT LSENI GCHG
RSDAT SCK
SCK
5-32
CTC2
TC
CXDPH1 CXDPH2
PK
SLP23
ENV
LPF COMP.
LPF
PK
SLP14
ENV
LPOS Block
MPX
TECENV
AGC
WBL
BAL VGA
Bypss
Detection
LPP
AGC BAL
Detection
Bypss
MPX
SEL
SH1
LPF/
AAF S/H
Bypass
AAF S/H
ATT SEL
AAF S/H
VGA
APC Block
LPF
ITH
5bit DAC
RD-scale RD
16bit DAC 11bit DAC
Read
Buffer
BS1
11bit DAC
Write
Buffer
PK1
11bit DAC
Write
Buffer
PK2
11bit DAC
Write
Buffer
RREF
MPX
SLPOS
CRWAGC
CRWCMP
CWBLCMP
CWBLBUF
CWBLVGA
WBLDIF
WBL
ASENV/LPPN
LPPS
CLPPHPP
CLPPPH
CWAGC2
CWAGC1
SH5
OFTR
SH2
SH3
VPD
FPDM
CPCAPH
CPCABH
CLPCLPF
IREAD
IWRT1
IWRT2
IWRT3