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Pin No.
Pin Name
47
48
49
50
51
52
DDVROUT
53
DDVRSEN
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
TE
L 13942296513
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
www
91
92
93
.
94
95
96
http://www.xiaoyu163.com
I/O
CLTV
I
Multiplier VCO1 control voltage input
FILO
O
Master PLL (slave = digital PLL) filter output
FILI
I
Master PLL filter input
PCO
O
Master PLL charge pump output
AVDD5
–
Analog power supply
O
DC/DC converter output
I
DC/DC converter output voltage monitor pin
AVSS5
–
Analog ground
DDCR
I
DC/DC converter reset pin
BCKI
I
D/A interface bit clock input
PCMDI
I
D/A interface serial data input (2's COMP, MSB first)
LRCKl
I
D/A interface LR clock input
LRCK
O
D/A interface LR clock output f = Fs
VSS
–
Internal digital ground
PCMD
O
D/A interface serial data output (2's COMP, MSB first)
BCK
O
D/A interface bit clock output
VDD
–
Internal digital power supply
EMPH
O
High when the playback disc has emphasis, low it has not
EMPHI
I
High when de-emphasis is ON, low when input OFF
IOVDD2
–
I/O digital power supply
DOUT
O
Digital Out output
TEST
I
Test pin Normally ground
TES1
I
Test pin Normally ground
IOVss2
–
I/O digital ground
XVSS
–
Master clock ground
XTAO
O
Crystal oscillation circuit output
XTAI
I
Crystal oscillation circuit input
XVDD
–
Master clock power supply
AVDD1
–
Analog power supply
AOUT1
O
Lch analog output
VREFL
O
Lch reference voltage
AVSS1
–
Analog ground
AVSS2
–
Analog ground
VREFR
O
Rch reference voltage
AOUT2
O
Rch analog output
AVDD2
–
Analog power supply
IOVDD0
–
I/O digital power supply
RMUT
O
Rch "0" detection flag (Not used)
LMUT
O
Lch "0" detection flag (Not used)
XTSL
I
Crystal selection input (Not used)
IOVSS0
–
I/O digital ground
XTACN
I
Oscillation circuit control Self-oscillation when high, oscillation stop when low
SQSO
O
Subcode Q 80-bit and PCM peak and level data output, CD TEXT data output
SQCK
I
SQSO readout clock input
SBSO
O
Subcode P to W serial output
x
ao
EXCK
I
y
SBSO readout clock input
XRST
I
System reset Reset when low
i
SYSM
I
Mute input Muted when high
D ATA
I
Serial data input from CPU
VSS
–
Internal digital ground
http://www.xiaoyu163.com
8
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2 9
9 4
2 8
Description
1 5
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8
2 9
9 4
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HCD-RG121
9 9
2 8
9 9
43
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