Yamaha RX-V1700 Service Manual page 106

A B C
RX-V1700/DSP-AX1700
FUNCTION 1/4
1
2
5.5
2.3 0
0.2 2.3 0
11.9 5.0
4.5
0 0 0.1
3 2.3 0
5.6
2.3
0
0
11.9
0
0
5.6
2.0 1.8
0
B-3
5.1
~ 0
4
5
6
7
To FUNCTION 2/4
4.2
0
no-use
no-use
8
Page 117 K3
to FL (6)_W9501
9
# All voltages are measured with a 10MΩ/V DC electronic voltmeter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
10
106
D E F
3.1
4.7K 0
0
0 0
0.1 0.1
0.1 4.9
0.1 0.1
4.9 0
5.0 4.9
5.0 4.9
0.1 4.9
4.9
4.9
MICROPROCESSOR
4.9
0.1 4.9
(MAIN)
0.1 4.9
0 4.9
0 5.1
5.1 0
5.1 0
0
0
0 5.1
0 0
4.9 5.1
0 0
0 5.0
4.5 4.9
4.9 0
5.1 0.1
5.1 0.1
1.1 4.9
0.1
1.1
~
0.4
1.4 4.9
5.1
1.7 5.0
5.1
0
0.1
0 5.1
5.1
5.1 B-2
1.4 4.9 4.9
5.1
0.4 0.4
4.9
0.2
0
5.1
5.0
4.5
4.9
5.1 5.1
8.3 5.8 5.8
0 3.7
5.1
5.1
0
Page 112 H7 Page 112 D2
to POWER (4)_W1 to POWER (3)_W9
C-1 C-2
2
1
POINT B-2 Pin 20 of IC402 POINT B-3 Pin 12 of IC401
G H I
0 0
0 0
0
4.9 5.1 0
11.2
5.0
5.6
5.1 5.0
5.1
4.9
-11.2
5.1
4.9
-11.2
5.1
4.9
-11.2
5.1
4.9
-11.2
5.1
4.9
-11.2
5.1
4.9
-11.2
3.3
0
0
0
5.1
4.9
5.0
-11.2
0
0
0
5.1
0
0
0
FUNCTION (1)
Page 112 G7 Page 114 I2 Page 103 E2
to POWER (3)_CB18 to A-VIDEO_CB203 to DSP_CB504
POINT C-1 1 / Pin7, 2 / Pin8 of CB405
+5M 1
1
/RES 2 2
AC cable ON AC cable OFF AC cable ON
J K L
IC401: LC72722PM
RDS signal processor
VDDA 3
REFERENCE
VOLTAGE
VSSA 4
ANTIALIASING
MPX IN 2
FILTER
DO 20
CL 21
DI
22
CE 23
T1
7
T2 8
T3 9
T4 10
IC402: M30845FJGP
Single chip 16/32-bit microprocessor
NOTES:
IC404, 406: SN74AHCT1G32DCKR
Single 2-input positive-OR gate
A 1 5 Vcc
B 2
GND 3 4 Y
IC407: RH5RE58AA-T1-FA IC403: LC709004A-TLM-E
Voltage regulator I/O-expander for microcontroller
V V
IN OUT
2 3
DIN
+
CLK#
–
CS#
Vref
1
RES#
GND
M N
1 5 6
CLOCK 14 VDDD
PLL
RECOVERY
(57 kHz)
(1187.5 Hz)
15 VSSD
VREF
57 kHz
SMOOTHING DATA
bpf 19 RDS-ID
FILTER DECODER
(SCF)
18 SYNC
RAM ERROR CORRECTION SYNC / EC
CCB (24 BLOCK DATA) (SOFT DECISION) CONTROLLER
24 SYR
CLK (4.332 MHz)
MEMORY
CONTROL
TEST SYNC SYNC
DETECT-1 DETECT-2
OSC/DIVIDER
11 16 17 13 12
8 8 8 8 8 8 8
Port P0 Port P1 Port P2 Port P3 Port P4 Port P5 Port P6
< (3) > < CC1 (3) >
V CC2 V
Peripheral Functions
A/D Converter: Clock Generation Circuit
1 circuit X - X
IN OUT
X - X
Timer (16 bits) Standard: 10 inputs CIN COUT
Timer A: 5 channels (2)
Maximum: 34 inputs On-chip Oscillator
Timer B: 6 channels
PLL Frequency Synthesizer
UART/Clock Synchronous Serial I/O:
Three-Phase Motor Control Circuit 5 channels DMAC
Watchdog Timer (15 bits) X/Y Converter: DMACII
16 bits x 16 bits
CRC Calculation Circuit (CCITT):
D/A Converter:
8 bits x 2 channels CAN Module: 1 channel X 16 +X 12 +X 5 +1
M32C/80 series CPU Core
Memory
Intelligent I/O R0H R0L FLG
INTB ROM
R1H R1L
Time Measurement: 8 channels
R2
Waveform Generating: 8 channels ISP
Communication Functions:
R3 USP RAM
Clock Synchronous Serial I/O, UART,
HDLC Data Processing A0 PC
A1 SVF
FB SVP
Multiplier
SB VCT
< >
V (3) < V (3) >
CC1 CC2
Port P14 Port P15 Port P11 Port P12 Port P13
7 8 5 8 8
(Note 1)
1. Ports P11 to P15 are provided in the 144-pin package only.
2. Included in the 144-pin package only.
3. The supply voltage of M32C/84T (High-reliability version) must be V CC1 =V CC2 .
IC405: SN74AHC1G08DCKR
2-input positive-AND gate
A 1 5 Vcc
B 2
GND 3 4 Y
2 Serial/parallel converter/shift register 14 DOUT
3 15 VDD
19 VSS
4
I/O control/output register
21
port 0 I/O buffer port 1 I/O buffer
24 17 15 8