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3. IC902, IC904, IC908 (H Driver) and IC907 (V Driver)
An H driver and V driver are necessary in order to generate
the clocks (vertical transfer clock, horizontal transfer clock
and electronic shutter clock) which driver the CCD.
IC902, IC904 and IC908 are inverter IC which drives the hori-
zontal CCDs (H1 and H2). In addition the XV1-XV3 signals
which are output from IC102 are the vertical transfer clocks,
and the XSG1 and XSG signal which is output from IC102 is
superimposed onto XV2A and XV2B at IC907 in order to gen-
erate a ternary pulse. In addition, the XSUB signal which is
output from IC102 is used as the sweep pulse for the elec-
tronic shutter, and the RG signal which is output from IC102
is the reset gate clock.
1A 1
1Y 2
2A 3
2Y 4
3A 5
3Y 6
GND 7
Fig. 1-3. IC902, IC904 and IC908 Block Diagram
4. IC905 (CDS, AGC Circuit and A/D Converter)
The video signal which is output from the CCD is input to Pin
(30) of IC905. There are S/H blocks inside IC905 generated
from the XSHP and XSHD pulses, and it is here that CDS
(correlated double sampling) is carried out.
After passing through the CDS circuit, the signal passes
through the AGC amplifier. It is A/C converted internally into
a 10-bit signal, and is then input to IC102 of the CA2 circuit
board. The gain of the AGC amplifier is controlled by serial
data which is output from IC102 of the CA2 circuit board.
14
V
CC
13
6A
12
6Y
11
5A
10
5Y
9
4A
8
4Y
V
DD
Input
Buffer
XSHT
XV3
XSG3B
XSG3A
XV1
XSG1B
XSG1A
XV4
XV2
Fig. 1-4. IC907 Block Diagram
– 10 –
PBLK
AVDD
AVSS
4 dB
CDS
CCDIN
2:1
MUX
CLP
CLPDM
BUF
CONTROL
2:1
AUX1IN
REGISTERS
MUX
AUX2IN
CLP
INTERFACE
SL
SEN
Fig. 1-5. IC905 Block Diagram
SHT
V3B
V
L
V3A
V1B
V
H
V1A
V4
V2
GND
CLPOB
AD9840
DRVDD
CLP
DRVSS
2~36 dB
10
10-BIT
VGA
DOUT
ADC
Offset
10
VRT
BANDGAP
DAC
REFERENCE
VRB
8
CML
INTERNAL
BIAS
DVDD
INTERNAL
DIGITAL
TIMING
DVSS
SCK
SDATA
SHP
SHD
DATA
CLK
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