1. Manuals
  2. Brands
  3. Themis Manuals
  4. Motherboard
  5. TA64
  6. Hardware manual

Themis TA64 Hardware Manual

Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
TA64 Hardware Manual
Themis Computer—Americas and Pacific Rim
47200 Bayside Parkway
Fremont, CA 94538
Phone (510) 252-0870
Fax (510) 490-5529
World Wide Web http://www.themis.com
Version 1.0—May 2006
Themis Computer—Rest of World
5 Rue Irene Joliot-Curie
38320 Eybens, France
Phone +33 476 14 77 80
Fax +33 476 14 77 89

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the TA64 and is the answer not in the manual?

Questions and answers

Related Manuals for Themis TA64

Summary of Contents for Themis TA64

  • Page 1 TA64 Hardware Manual Version 1.0—May 2006 Themis Computer—Americas and Pacific Rim Themis Computer—Rest of World 47200 Bayside Parkway 5 Rue Irene Joliot-Curie Fremont, CA 94538 38320 Eybens, France Phone (510) 252-0870 Phone +33 476 14 77 80 Fax (510) 490-5529 Fax +33 476 14 77 89 World Wide Web http://www.themis.com...
  • Page 2 Themis Computer assumes no responsibility for inaccuracies. Themis Computer retains the right to make changes to this publication at any time without prior notice. Themis Computer does not assume any liability arising from the application or use of this publication or the product(s) described herein.
  • Page 3 TA64 Hardware Manual Version Revision History Version 1.0 .....................May 2006 Themis Computer...
  • Page 4 TA64 Hardware Manual Themis Computer...

  • Page 5: Table Of Contents

    1.2 Check Configurations .................... 1-2 1.2.1 Combination PS/2–USB Connector (Custom Order) ........ 1-3 1.2.2 SCSI Termination ..................1-4 1.3 Install the TA64 Paddle Board ................1-6 1.4 Attach I/O Cables ....................1-8 1.4.1 Serial Port A (RS232) & Port B (RS232/RS422) ........1-8 1.4.1.1 Front Panel Connection ..............
  • Page 6 TA64 Hardware Manual 2. TA64 Features and Specifications ................2-1 2.1 Baseboard ....................... 2-1 2.2 PMC/XMC Carrier Boards ..................2-3 2.3 Graphics Board ...................... 2-4 2.4 Paddle Board ......................2-4 2.5 Backplane Jumper Settings ..................2-5 2.6 System Specifications .................... 2-5 2.6.1 Processor &...
  • Page 7 4.4.6 DMA Controller ..................4-19 5. Field-Programmable Gate Array (FPGA) ..............5-1 5.1 Introduction ......................5-1 5.2 VME Reset Control ....................5-2 5.3 Watchdog Timer ....................5-3 5.3.1 Watchdog Timers ..................5-3 5.3.2 Watchdog-Related Registers ..............5-3 5.3.3 Watchdog Start/Restart ................5-3 Themis Computer...
  • Page 8 5.5.17 WATCHDOG_2_STATUS Register ............5-16 5.5.18 WATCHDOG_INT_MASK Register ............5-17 Appendix A. Connector Pinouts and LED Indicators ..........A-1 A.1 TA64 Front-Panel Connectors ................A-1 A.1.1 VME P1 Connector ................... A-1 A.1.2 VME P2 Connector ................... A-3 A.1.3 Gigabit Ethernet (GBE) Port A ..............A-5 A.1.4 Serial Port A (RS232) and Port B (RS232, RS422) .........
  • Page 9 C.1.2 Inserter/Extractor Handles .................C-2 C.1.2.1 VME64-type Handles ..............C-2 C.1.2.2 Triple-E-type Handles ..............C-2 C.2 TA64 Front Panels ....................C-3 C.2.1 TA64/1—Baseboard Only ...............C-4 C.2.2 TA64/2P2—Baseboard and 2-PMC Carrier Board ........C-5 C.2.3 TA64/2P3—Baseboard and 3-PMC Carrier Board ........C-6 C.3 LEDs ........................C-7 Themis Computer...
  • Page 10 TA64 Hardware Manual Appendix D. Board Diagrams ..................D-1 D.1 TA64 Baseboard ....................D-1 D.2 PMC/XMC Carrier Boards ................... D-1 D.3 TA64 P2 Paddle Board ..................D-1 Appendix E. Glossary .......................E-1 Appendix F. VME Slot Configurations ................F-1 Index..........................Index-1...
  • Page 11 List of Figures Figure 1-1 Setting Solder Beads to Enable USB or PS/2 ..........1-3 Figure 1-2 TA64 with PMC Carrier and Paddle Boards in a VME Backplane....1-4 Figure 1-3 SCSI Termination Configurations ..............1-5 Figure 1-4 TA64 Paddle Board I/O Connections (Top-Side View) ........1-7 Figure 1-5 Location of the TOD/NVRAM Battery ............
  • Page 12 TA64 Hardware Manual Figure A-12 TA64 Paddle Board I/O Connections (Top-Side View) ....... A-19 Figure A-13 Paddle Board Ultra320 SCSI Port A Connector Pinout ....... A-20 Figure A-14 GPIN/GPOUT Connector Pinout..............A-20 Figure A-15 Floppy-Drive Connector Pinout..............A-22 Figure A-16 I2C Connector Pinout ................... A-23 Figure A-17 Dual Stereo Audio Connector...............
  • Page 13 Table 1-1 TA64 Model Configurations................1-1 Table 1-2 PS/2 and USB Protocols and Connectors ............1-3 Table 1-3 TA64 P2 Paddle Board I/O Connections ............1-6 Table 1-4 TA64 Integration Kit 112579-0xx (011/012/001/002) ........1-6 Table 2-1 Memory Configurations................... 2-3 Table 2-2 Processor Specifications ..................
  • Page 14 Table 5-17 Watchdog_2_Status Register 0xFD00.0028..........5-16 Table 5-18 Watchdog_Int_Mask register 0xFD00.0040..........5-17 Table A-1 TA64 VME P1 Connector-Pin Signals ............A-2 Table A-2 TA64 VME P2 Connector-Pin Signals ............A-4 Table A-3 Gigabit Ethernet Connector-Pin Signals and LED Interpretation ....A-5 Table A-4 Serial Ports A and B Connector-Pin Signals ..........
  • Page 15 Table B-1 TA64 Jumper-Pin Settings (Top Side)............. B-2 Table B-2 SCSI A Access Definition ................B-3 Table B-3 TA64 Solder-Bead Settings (Bottom Side) ............. B-5 Table B-4 PS/2 and USB Protocols and Connectors ............B-6 Table C-1 TA64 Model Configurations................C-1 Table C-2 Front-Panel LED Interpretation ...............
  • Page 16 TA64 Hardware Manual Themis Computer...

  • Page 17: How To Use This Manual

    4 GB of DDR333 SDRAM memory—as well as a standard PMC Module card (64 bit @66 MHz)—can be installed on the TA64, which can be ordered with either a default dual-USB connector (dual-USB interface only) or a DIN-8 connector (PS/2 or dual-USB interface).
  • Page 18 TA64 does not support PCI Express; hence XMC Modules are not supported. b—TGA3D/3D+ Graphics Boards are not supported by the TA64. Instead, a TGA-7000 PMC Graphics Card is recommended. c—New 2P2 PMC/XMC Carrier Board (P/N 112794-001) only; the standard version 2P2 PMC Carrier Board is not compatible.

  • Page 19: Intended Audience

    TA64 and assumes the BIOS program code is installed in the system Flash memory. The TA64 has been tested with Solaris 9 and 10, Linux Redhat v4, Windows XP, and Windows Server 2003 operating systems.
  • Page 20 The TA64 contains statically sensitive components. Industry-standard an- Caution: tistatic measures must be observed when removing the TA64 from its shipping con- tainer and during any subsequent handling. A wrist strap provides grounding for static electricity between your body and the chassis of the system unit. Electric cur- rent and voltage do not pass through the wrist strap.
  • Page 21 Manual, available on the Tundra website at http://www.tundra.com. • Chapter 5, "Field-Programmable Gate Array (FPGA)" provides a description of the FPGA on the TA64. Included in this chapter are descriptions of the VME reset control, watchdog timers, X-Bus flash, and all registers.
  • Page 22 TA64 Hardware Manual Related References The following is a list of related references • TA64 Software Manual (P/N-111999-023) • PCI Local Bus Specification, Revision 3.0, PCI Special Interest Group, Port- land • American National Standard for VME64, ANSI/VITA, 1-1994; also VME64x, ANSI/VITA, 1.1-1997...
  • Page 23 Website Information Themis Computer corporate and product information may be accessed on the World Wide Web by browsing the website http://www.themis.com. The Sales & Marketing Department may be reached at info@themis.com.
  • Page 24 In Case Of Difficulties If the TA64 does not behave as described or if you encounter difficulties installing or configuring the board, please call Themis Computer technical support at +1 (510) 252-0870, fax your questions to +1 (510) 490-5529, or e-mail to support@the- mis.com.

  • Page 25: Ta64 Installation

    TA64 does not support PCI Express; hence XMC Modules are not supported. b—TGA3D/3D+ Graphics Boards are not supported by the TA64. Instead, a TGA-7000 PMC Graphics Card is recommended. c—New 2P2 PMC/XMC Carrier Board (P/N 112794-001) only; the standard version 2P2 PMC Carrier Board is not compatible.

  • Page 26: Check Configurations

    To install the TA64, a standard VME64 chassis with J1/J2 backplane (3-row or 5- row connector) is required. If the TA64 is to be used in a workstation configuration instead of an embedded controller, a hard disk and graphics frame buffer or serial terminal will also be required.

  • Page 27: Combination Ps/2-Usb Connector (Custom Order)

    TA64. DO NOT ATTEMPT TO ALTER SOLDER-BEAD CONFIGURA- TIONS. Instead, contact Themis to change any settings. Although dual-USB is the default connector on the TA64 Front Panel, a mini-DIN-8 may be ordered instead. The following section describes the proper configuration for the mini-DIN-8 connector on the TA64 Front Panel.

  • Page 28: Scsi Termination

    TA64 with PMC Carrier and Paddle Boards in a VME Backplane Since the TA64 SCSI Controller is always at one end of both the SCSI A bus and the SCSI B bus, the on-board SCSI A and SCSI B terminators are always enabled.

  • Page 29: Figure 1-3 Scsi Termination Configurations

    1—TA64 Installation Check Configurations SCSI A and SCSI B bus configurations are shown in Figure 1-3. Front Panel P1 Connector SCSI Controller State = On State = On Terminator Terminator Terminator Last SCSI B Terminator SCSI B Bus Device P2 Connector...

  • Page 30: Install The Ta64 Paddle Board

    TA64 Hardware Manual Install the TA64 Paddle Board The TA64 Paddle Board (see Figure 1-4) attaches to the rear of the P2 slot occupied by the TA64 Baseboard on the VME backplane (see Figure 1-2 on page 1-4). The connections provided by the TA64 Paddle Board are described in Table 1-3.

  • Page 31: Figure 1-4 Ta64 Paddle Board I/O Connections (Top-Side View)

    1—TA64 Installation Install the TA64 Paddle Board Caution: The TA64 Paddle Board contains four sets of jumper-pins (JP1, JP2, JP3, and JP4) that are associated with manufacturing testing. These jumper-pins should all be set to OFF. Changing jumper-pin settings will cause the Paddle Board to op- erate in an erratic manner.

  • Page 32: Attach I/O Cables

    TA64 Hardware Manual Attach I/O Cables To connect the TA64 to peripheral devices and networks, you must attach the proper I/O cables to the appropriate Front Panel and VME P2 Paddle Board connectors. The following sections provide information on what adapter cables are required and how to attach them.

  • Page 33: 2P2 Pmc/Xmc Carrier Board Only

    Use a standard RJ45 cable to connect to an external network. After attaching the TA64 to a network through Ethernet A or Ethernet B, you can verify if a proper physical connection has been made by executing the proper network command.

  • Page 34: Ultra320 Scsi A (Paddle Board) And B (Baseboard)

    40-pin ribbon cable (refer to Figure C-3, page C-4). Please note that IDE signals are not routed to the TA64 VME P2 connector. Caution: Do not use a high-speed, 80-pin, ribbon cable to connect to the IDE Port.

  • Page 35: Paddle-Board Only: Usb Port C And Usb Port D

    P2 connector of the TA64 VME backplane (see Table A-2, page A-4, in Appen- dix A, "Connector Pinouts and LED Indicators"). To access USB Ports C and D, you can use the TA64 P2 Paddle Board (see the sec- tion “Install the TA64 Paddle Board” on page 1-6).

  • Page 36: Tod/Nvram Battery Replacement

    TA64 Hardware Manual TOD/NVRAM Battery Replacement The TA64 has its own lithium battery to operate the TOD clock and maintain the contents of the NVRAM during a power shutdown. Located directly on the top sur- face of the PCB, the battery provides power backup for approximately 10 years.

  • Page 37: Figure 1-6 Tod/Nvram Battery Replacement

    1—TA64 Installation TOD/NVRAM Battery Replacement 3. With a long-nose pliers (or other suitable tool), carefully pry the sides of the battery back and forth and upward until the four battery pins are free of the battery socket (see A in Figure 1-6).
  • Page 38 TA64 Hardware Manual 1-14 Themis Computer...

  • Page 39: Ta64 Features And Specifications

    VMEbus board with an Turion64 CPU and the 8000-series AMD chipset featuring HyperTransport technology supporting two high-speed PCI-X interfaces. The TA64 is available at a processor speed of 800 MHz or 1.6 GHz (with a 1-MB L2 cache and 128-KB L1 cache for instruction plus data), with a HyperTransport technol- ogy I/O bandwidth of up to 6.4 GB/s—see Figure 2-1, page 2-2.

  • Page 40: Figure 2-1 Ta64 Block Diagram

    Front Panel Connector Front Panel Connector A PMC Module such as the TGA-7000 can be with solder-bead switched used to support high-speed graphics. VME P2 Paddle Board dual functionality Figure 2-1. TA64 Block Diagram Themis Computer...

  • Page 41: Pmc/Xmc Carrier Boards

    TA64 is purchased. PMC/XMC Carrier Boards There are two types of Carrier Boards that will operate with the TA64: the 2P2 PMC/XMC Carrier Board and the 2P3 PMC Carrier Board. For detailed information on Themis PMC/XMC Carrier Boards, refer to the PMC/ XMC Carrier Board Manual, Themis P/N 112826-020.

  • Page 42: Graphics Board

    Installation Guide, Themis P/N 112874-021. Paddle Board A Paddle Board is available for the TA64 that allows access to most signals of the VME P2 backplane by plugging directly into the P2 slot behind the TA64. The Pad- dle Board provides connections for: •...

  • Page 43: Backplane Jumper Settings

    2—TA64 Features and Specifications Backplane Jumper Settings Backplane Jumper Settings In compliance with the VME Specification, the PMC/XMC Carrier Board assures the continuity between bus grants BG[0..3]IN to BG[0..3]OUT, and the interrupt acknowledge daisy-chain IACKIN to IACKOUT. System Specifications 2.6.1 Processor &...

  • Page 44: I/O Subsystem

    TA64 Hardware Manual 2.6.2 I/O Subsystem Table 2-4 summarizes the I/O subsystem functionality of the various TA64 product configurations. I/O access on the TA64/2p3 is through installed PMC Modules. Table 2-4. TA64 I/O Subsystem Specifications 2P2 PMC/XMC TA64 VME P2 Access...
  • Page 45 2—TA64 Features and Specifications System Specifications Table 2-4. TA64 I/O Subsystem Specifications (Continued) 2P2 PMC/XMC TA64 VME P2 Access Carrier Board Function Front-Panel (TA64 or PMC/XMC Front-Panel Access Carrier Board) Access Ethernet Port B (RJ45) Auto-negotiating — 10/100/1000BaseT SCSI Port A —...

  • Page 46: Auxiliary Functions

    TA64 Hardware Manual 2.6.3 Auxiliary Functions Table 2-5 summarizes the functional specifications of the TA64 auxiliary functions. These specifications apply to all product configurations. Table 2-5. Auxiliary Functions Specifications Feature/Function Specifications Flash Memory Three (3) 4-MB Flash devices NVRAM/TOD 8 KB, battery-backed UPI Static RAM plus timekeeper...

  • Page 47: Environmental Specifications

    Air Flow (inlet) 300 lfm air flow at 55° C @ 1.6 GHz minimum a—A non-condensing environment must be maintained at all times. Themis recommends that the board be opera- tional (powered on) and temperature stabilized before and during humidity testing.

  • Page 48: Estimated Power Requirements

    TA64 Hardware Manual Estimated Power Requirements Table 2-8. Estimated Power Requirements Baseboard Configuration Watts Dissipation, typical Watts Dissipation, typical (TA64/1) (800-MHz processor) (1600-MHz processor) 1024 MBytes memory 23 Watts 25 Watts 2048 MBytes memory 23.5 Watts 25.5 Watts 2-10 Themis Computer...

  • Page 49: Hardware Overview

    For a block diagram of baseboard components, consult Figure 2-1 on page 2-2. 3.1.1 Turion64 Processor The Central Processor Unit (CPU) that is used in the TA64 is the Advanced Micro Devices (AMD) Turion64 processor, available with an operating speed of 800 MHz and 1.6 GHz.

  • Page 50: Hypertransport Technology

    PCI-X bus bridges that are integrated with a high-speed HyperTransport technology tunnel. Tunnelling provides the capability to connect with other HyperTransport technology devices that are downstream (see Figure 3-1); namely, the AMD 8111 (see next section) in the TA64. AMD 8131 HyperTransport Turion64...

  • Page 51: 3.1.2.2 Amd 8111 Hypertransport I/O Hub

    • An integrated 10/100 Ethernet MAC with MII interface (not used) • Two USB OHCI controllers and one USB EHCI controller supporting six ports • An EIDE controller supporting ATA-33, 66, 100, and 133 transfer modes • An LPC bus Themis Computer...

  • Page 52: Tundra Ca91C142 Universe Ii

    TA64 Hardware Manual • A high-precision event timer • A serial IRQ interface • An IOAPIC controller • A real-time clock (RTC) • ACPI-compliant power management logic • 32 GPIO pins (multiplexed with other functions) • Privacy security logic • 492-pin PBGA package 3.1.3...

  • Page 53: Bcm5703 Gigabit Ethernet Controller/Transceiver

    PHY. Support for 802.3 functions is features in the MAC; namely, VLAN tagging, layer-2 priority encoding, link aggregation, and full-duplex flow control. Features include: • A single-chip solution for LAN on Motherboard (LOM) and Network Interface Card (NIC) applications • Integrated 10Base-T/100Base-TX/1000Base-T transceivers • 10/100/1000 triple-speed MAC Themis Computer...

  • Page 54: Winbond W83627F Lpc Super I/O

    TA64 Hardware Manual 3.1.6 Winbond W83627F LPC Super I/O The Winbond W83627F Super I/O is a low pin count (LPC) device that is equivalent in performance to its ISA interface counterpart. Disk-drive adapter functions include a floppy-disk drive controller that is compatible with the 82077/765 industry stan- dard, data separator, write pre-compensation circuit, decode logic, data-rate selec- tion, clock generator, drive interface control logic, and interrupt and DMA logic.

  • Page 55: Xr17D152 Dual Uart (Duart)

    Flash devices; the other is to implement the reset logic. 3.1.11 FPGA The FPGA (Field-Programmable Gate Array) resides on the LPC (Low Pin Count) bus and is the conduit to the GPIO, X-bus flash, status LEDs, configuration jumpers and solder beads, and buffer control switch. Themis Computer...

  • Page 56: Flash Memory

    3.1.12 Flash Memory The TA64 contains both a user and a system Flash memory, both of which are pro- grammable. A 2-MB system Flash, which serves to boot the system, resides on the LPC bus, and the 16-MB user Flash resides on the X-bus, which is connected directly to the FPGA.

  • Page 57: Pmc/Xmc Carrier Boards

    3—Hardware Overview PMC/XMC Carrier Boards PMC/XMC Carrier Boards Detailed information on Themis PMC/XMC Carrier Boards is given in the PMC/XMC Carrier Board Manual, Themis P/N 112826-020. BIOS BIOS code is contained in 512 KB of system Flash memory and provides the follow- ing functionality: •...
  • Page 58 TA64 Hardware Manual 3-10 Themis Computer...

  • Page 59: Universe Ii Description

    Features Tundra’s Universe II (CA91C142) interfaces the local 32-bit PCI bus to the VME- bus. The following lists some of the Universe II’s features on the TA64 board: • 33 MHz, 32-bit PCI bus interface • Fully compliant, high performance 64-bit VMEbus interface •...

  • Page 60: Vmebus Interface

    • Support for RMW (Read, Modify, Write) cycles and lock cycles This chapter is intended to outline the VMEbus to PCI Bus interface on the TA64. If more detailed information is need, please refer to the Tundra Universe II User’s Manual, Spring 1998.

  • Page 61: Universe Ii As The Vmebus Master

    Interface and are awarded it in a fair manner. There are several methods available for user to configure the relative priority that the DMA channel and the PCI Bus Tar- get Channel have over the VMEbus Master Interface. The PCI Target Channel requests the VMEbus Master Interface when: Themis Computer...
  • Page 62 TA64 Hardware Manual • the TXFIFO contains a completed transaction • if there is a coupled cycle request. The DMA Channel requests the VMEbus Master Interface when: • the DMAFIFO has 64 bytes available when reading from the VMEbus • the DMAFIFO has 64 bytes in its FIFO when writing to the VMEbus •...

  • Page 63: Vmebus First Slot Detector

    As defined by the VME64 specification, the Universe II samples the BG3IN* right after the reset to determine if the TA64 resides in slot 1. If the BG3IN* is sampled low right after the reset, the TA64 board becomes the SYSCON. Otherwise the SYSCON Module of the Universe II is disabled.

  • Page 64: 4.2.4.1 Automatic Slot Identification

    — An Arbitration Module — A bus timer — An IACK Daisy Chain Driver (DCD). The TA64 supports Round-Robin arbitration. The VMEbus arbitrator time out is also controlled by the MISC_CNT register described above. The timer may be set to either 16 μ...

  • Page 65: 4.2.4.2 Register Access At Power Up

    Register access at power up is used in a system where either the Universe II is inde- pendent of the local CPU or a CPU is not present. Since the Universe II and the Turion64 are present on the TA64, register access at power up is not supported. 4.2.5 Universe II’s Hardware Power-Up Options...

  • Page 66: Table 4-2 Universe Ii Power Up Options

    TA64 Hardware Manual Table 4-2. Universe II Power Up Options (Continued) Option Register Field Default Pins Disabled VA[13] LSI0_CTL LAS[0] Memory VA[12] PCI Target IMAGE VA[11..10] LSI0_BS VA[9..6] LSI0_BD VA[5..2] PCI Bus Size MISC_STAT LCLSIZE 32-bit REQ64* PCI CSR Image Space...

  • Page 67: Slave Image Programming

    Also, the address modified must match modifier specified by the address space, access mode, and type fields. A description of the VMEbus fields for VMEbus Slave Images in presented in Table 4-5, page 4-10. Themis Computer...

  • Page 68: 4.3.1.2 Pci Bus Fields

    TA64 Hardware Manual The Universe II’s eight VMEbus slave images (0-7) are bounded by A32 space. Slave images 0 and 5 have a 4 KB resolution. Typically, these images would be used as an A16 image since they provided the finest granularity. Slave images 1 to 3 and 6 to 8 have a 64 KB resolution.

  • Page 69: 4.3.1.3 Control Fields

    64-bit PIC bus trans- enable PCI64 LD64EN in VSIx_CTL actions Note: For a VMEbus slave image to respond to an incoming cycle, the PCI Mas- ter Interface must be enabled (bit BM in the PCI_CSR register). 4-11 Themis Computer...

  • Page 70: Pci Bus Target Images

    TA64 Hardware Manual 4.3.2 PCI Bus Target Images The Universe II accepts accesses from the PCI bus with specific programmed PCI target images that open windows to the VMEbus and control to the type of access to the VMEbus. There are eight (0-7) standard PCI target images and one special PCI target image.

  • Page 71: 4.3.2.3 Control Fields

    Posted writes are performed when the PWEN bit is set and the particular PCI target image is accessed. Posted writes are only decoded within PCI Memory space. Access from other memory spaces are performed with coupled cycles, regardless of the setting of the PWEN bit. 4-13 Themis Computer...

  • Page 72: 4.3.2.4 Special Pci Target Image

    TA64 Hardware Manual Table 4-10. Control Fields for PCI Bus Target Image Field Register Bits Description image enable EN in LSIx_CTL enable bit posted write PWEN in LSIx_CTL posted write enable bit Note: For a VMEbus slave image to respond to an incoming cycle, the PCI Mas- ter Interface must be enabled (bit BM in the PCI_CSR register).

  • Page 73: Control Fields For Special Pci Bus Target Image

    PGM [3..0] Program/Data AM Code Each of the four bits specifies Program/Data AM code for the 15:12 corresponding 16 mB region. The lower order bits correspond to the lower order address regions. 0 = Data, 1 = Program 4-15 Themis Computer...

  • Page 74: Table 4-13 Special Pci Target Image Register (Offset 188)

    TA64 Hardware Manual Table 4-13. Special PCI Target Image Register (Offset 188) (Continued) Reset Bits Name Type Description State SUPER Supervisor/User AM Code [3..0] Each of the four bits specifies Supervisor/User AM code for the 11:8 corresponding 16 MB region. Lower order bits correspond to the lower address regions.

  • Page 75: Universe Ii's Interrupt And Interrupt Handler

    VIRQ*[7..0]. If a hardware and software source are assigned to the same VMEbus VIRQ*n pin, the software source always has higher priority. Interrupt sources mapped to the PCI bus interrupts are generated via the PCI Inter- 4-17 Themis Computer...

  • Page 76: Vmebus Interrupt Handling

    TA64 Hardware Manual rupt pin, INT*0. For the VMEbus interrupt outputs, the Universe II interrupter provides an 8-bit STA- TUS/ID to a VMEbus interrupt handler. Optionally, the Universe II generates an internal interrupt to signal that the interrupt vector has been provided.

  • Page 77: Dma Controller

    DMA has finished the operations described by one command packet, the DMA controller can automatically move on to the next command packet in the linked-list of command packets (refer to “DMA Controller” on page 2-77 of the Universe II User’s Manual). 4-19 Themis Computer...
  • Page 78 TA64 Hardware Manual 4-20 Themis Computer...

  • Page 79: Field-Programmable Gate Array (Fpga)

    Operation Section Chapter Field-Programmable Gate Array (FPGA) Introduction The FPGA is specifically designed for the TA64 to implement the following func- tions: • VME reset control • A 2-level watchdog timer • Internal registers that reflect the board settings • An LPC-to-ISA bus interface •...

  • Page 80: Vme Reset Control

    TA64 Hardware Manual VME Reset Control When an outgoing VME reset is generated by the Universe II, the incoming VME reset to the Universe II is masked by the FPGA, so that a reset deadlock does not occur. When the incoming VME reset is received by the Universe II, it will generate a local reset.

  • Page 81: Watchdog Timer

    • Watchdog Timer 1—The timer emits an interrupt to the Interrupt controller through the AMD8111, which is maskable in the FPGA. • Watchdog Timer 2—The timer emits a signal to reset the TA64 board via a cold_reset. This signal is maskable in the FPGA.

  • Page 82: X-Bus (Isa) Flash

    LPC to ISA bridge function. The CPU accesses the ISA Flash via the LPC interface of the AMD8111 chipset. This Flash can be used as a booting device, which holds the BIOS of the TA64 system. It can also be used as a user Flash if not as a booting device.

  • Page 83: Register Description

    FPGA_REV Register 0xFB00.0000 Field Access Description FPGA revision Revision Bit 0-3 Note: 0x0 and 0xf are reserved for Themis use. CPU family ID -- 0001 ---> SUN Hummingbird -- 0010 ---> SUN Phantom Family Bit 4-7 -- 0011 ---> SUN Corsair -- 0100 --->...

  • Page 84: Isr Control Register

    TA64 Hardware Manual 5.5.3 ISR Control Register The ISR™ (In System Reprogrammable™) register is used to program the FPGA configuration device EPC2. The TA64 Baseboard can update the FPGA by itself. Table 5-3. ISR control register 0xFB00.0001 Field Access Description...

  • Page 85: Boot Path Control Register 0Xfb00.0002

    1 = LPC Flash device not write protected Reserved Bit 7 Read as 0. Note: Bit 0 through bit 3 are writable only when bit 4 = ‘0’, where the TA64 boots from the ISA Flash device and not the LPC Flash. Themis Computer...

  • Page 86: Led Control And Watchdog Log Register

    5.5.5 LED Control and Watchdog Log Register The TA64 has four LEDs on the Front Panel that are associated with System Status (SYS STATUS). The LED Control and Watchdog Log register controls whether two of these LEDs—the System Enable (ENBL) LED and User (USER) LED—are turned on or off (see Section A.2, “TA64 LEDs,”...

  • Page 87: Vme Reset Register

    Universe VME Bit 4 reset 1 = assert VME reset to the Universe VME reset input (Pin: V22). @ reset: 0 Reserved Bit 5 Read as 0 Reserved Bit 6 Read as 0 Reserved Bit 7 Read as 0 Themis Computer...

  • Page 88: On-Board Io Setting Register

    TA64 Hardware Manual 5.5.7 On-Board IO Setting Register The On-Board IO Setting register reflects the settings of jumper pins and solder beads (see Appendix B, “Jumper Pins and Solder Beads”) on the TA64 baseboard. Table 5-7. On-Board IO Setting Register 0xFB00.0005 field...

  • Page 89: Scsi Setting Register

    SCSI Setting Register The SCSI Setting register controls the SCSI termination of the TA64 baseboard, and includes some legacy bit definitions that are not really used in the TA64. These unused bits are retained to ease migration to future products.

  • Page 90: Gpin And Gpout Register

    VME backplane is used, the SCSI-A can work in auto-sense mode. 5.5.9 GPIN and GPOUT Register TA64 offers three GPIN (General-Purpose input) and five GPOUT (General-Pur- pose output) signals on the VME P2 connector. This register is used to save the GPIN signals and control the GPOUT signals.

  • Page 91: Reserved Register

    Table 5-9. GPIN and GPOUT Register 0xFB00.0007 (Continued) Field Access Description (see following Note for all Bits) Themis Engineering testing 0 = connect the SMBus0 and SMBus1 TEST_I2C_CTL_L Bit 5 1 = disconnect connect the SMBus0 and SMBus1 @ reset: 1 General purpose output from VME P2.D1...

  • Page 92: Fpga Interrupt Mask Register

    5.5.11 FPGA Interrupt Mask Register The TA64 offers the capability for the GPIN0 and GPIN1 from the VME P2 connec- tor to generate interrupt to the CPU. The FPGA Interrupt Mask register is used to control/mask the interrupts from the GPIN0 and GPIN1 to the CPU.

  • Page 93: Watchdog_1_Limit Register

    0 means the counter’s value is not zero 1 means the counter’s value is zero watchdog1 expire Bit 1 Default = 0, This bit can be cleared by watchdog reset. Reserved Bit 2 - 7 Read as 0 5-15 Themis Computer...

  • Page 94: Watchdog_2_Counter Register

    TA64 Hardware Manual 5.5.15 WATCHDOG_2_COUNTER Register The WATCHDOG_2_COUNTER register provides the value of the current counter. The value is in of 0.1 second units; therefore, the range of this counter is from 1 to 65535 units of 0.1 seconds. After a watchdog reset, it contains value 1. When the watchdog is started, this register is loaded with the corresponding Limit Register contents and begins to count down.

  • Page 95: Watchdog_Int_Mask Register

    Default = 0 0 means the watchdog2’s interrupt (XIR_RESET) is NOT masked. 1 means the watchdog2’s interrupt (XIR_RESET) watchdog2 Bit 1 is masked. Default = 0 Bit 2 Default = 0 Reserved Bit 3 - 7 Read as 0 5-17 Themis Computer...
  • Page 96 TA64 Hardware Manual 5-18 Themis Computer...

  • Page 97: Appendix A. Connector Pinouts And Led Indicators

    Connector Pinouts and LED Indicators This appendix describes connector pinouts and their signals, as well as LED status indicators, for the TA64 and its associated boards. The TA64 front-panel connectors and LEDs, PMC/XMC Carrier Boards (2P2 and 2P3), Paddle Board, and Memory Module are each presented as individual sections.
  • Page 98 TA64 Hardware Manual Table A-1. TA64 VME P1 Connector-Pin Signals Row A Signal Row B Signal Row C Signal VME_D00 VME_BBSY* VME_D08 VME_D01 VME_BCLR* VME_D09 VME_D02 VME_ACFAIL* VME_D10 VME_D03 VME_BGIN0* VME_D11 VME_D04 VME_BGOUT0* VME_D12 VME_D05 VME_BGIN1* VME_D13 VME_D06 VME_BGOUT1* VME_D14...

  • Page 99: Vme P2 Connector

    Connector Type: 5-row, 160 pins (5x32), VME64 (Male) Manufacturer; Part Number: Harting; 02-01-160-2101 The pinout for the 5-row TA64 VME P2 connector is shown in Figure . All I/O sig- nals routed to the P2 connector are described in Table A-2 on page A-4. To access these P2-connector signals, a TA64 VME P2 Paddle Board (purchased separately) must be attached to the P2 backplane behind the TA64 (refer to Section A.4, “P2...

  • Page 100: Table A-2 Ta64 Vme P2 Connector-Pin Signals

    TA64 Hardware Manual Table A-2. TA64 VME P2 Connector-Pin Signals Row Z Signal Row A Signal Row B Signal Row C Signal Row D Signal GPIN3 GPOUT1 VCC (+5V) TEST_I2C_CTL_L GPOUT3 AC97_RST_L SCSI_A_P2-SENSE GPOUT4 DRVDEN0 AC97_SYNC RETRY_L SCSI_A_TermPwr SCSI_A_DIFF-SENSE AC97_BCLK VME_A[24] SCSI_A_ATN(–)

  • Page 101: Gigabit Ethernet (Gbe) Port A

    A—Connector Pinouts and LED Indicators TA64 Front-Panel Connectors A.1.3 Gigabit Ethernet (GBE) Port A Connector Type: RJ45 GBE Connector with Transformer, 8 Pin, 2 LEDs Manufacturer; Part Number: AMP/Tyco; 1605814-5 The Ethernet port is an RJ45 (10-pin; 8-pin external) GBE connector with two embedded LEDs (see Figure A-3 and Table A-3 below) supporting 10/100/ 1000Base-T transmission.

  • Page 102: Serial Port A (Rs232) And Port B (Rs232, Rs422

    Connector Type: Dual Connector, 2x15-pin micro-DIN Manufacturer; Part Number: ITT Cannon; MDSM-30PE-Z33-VR22 Themis Cable P/N: 108373 (RS232); for RS422, call Customer Support The connector pinout of Serial Port A and Serial Port B is shown in Figure A-4. Caution: Note the location of pin 1 on serial ports A and B. Connectors must match wires to pin numbers called out in Figure A-4 and Table A-4 on page A-7.

  • Page 103: Table A-4 Serial Ports A And B Connector-Pin Signals

    A—Connector Pinouts and LED Indicators TA64 Front-Panel Connectors Table A-4. Serial Ports A and B Connector-Pin Signals Port A Port B Description (RS232) Description (RS232/RS422) Signal Signal — RTS+ Request To Send + — RXD+ Receive Data + — TXD+...

  • Page 104: Default Connector-Usb Port A And Usb Port B

    Connector Type: Type A, Dual Stacked (version 1.1) Manufacturer; Part: AMP; 787617-4 Dual USB Ports A (USB0) and B (USB1) are the default connectors for the TA64 Front Panel. A connector pinout for this stacked connector is given in Figure A-5, and connector-pin signals are described in Table A-6.

  • Page 105: Custom Order Only-Din-8 Ps/2 Kb/Mouse Or Dual Usb Port

    USB Port Connector Type: 8-pin mini-DIN (Female) Manufacturer; Part Number: AMP; 749179-1 Themis Cable P/N: 110104-002 (PS/2 mode) Themis Cable P/N: 110473-001 (USB mode) Connector-pin signals for the combination PS/2–USB (USB0 or USB A, USB1 or USB B) connector (see Figure A-6) are given in Table A-7. Note that two additional USB ports—USB2 and USB3—can be accessed directly through a Paddle Board...

  • Page 106: A.1.6.1 Ps/2 And Usb Protocols

    Themis must be advised of whether you desire the PS/2 or USB protocol option at the time the TA64 is ordered, since it requires the setting of multiple solder beads on the TA64 at the factory before shipping (see Appendix B, “Jumper Pins and Solder Beads”).

  • Page 107: Ultra320 Scsi B Port

    SCSI B (wide, LVD) follows Ultra320-protocol (320 MB/sec) and is positioned to the left of the IDE port on the TA64 front panel. Figure A-8 shows the pinout of this connector, with connector-pin signals given in Table A-9 on page A-12.

  • Page 108: Table A-9 Scsi Port B Connector Pin Signals

    TA64 Hardware Manual Table A-9. SCSI Port B Connector Pin Signals Signal Description Signal Description +DB(12) + Data 12 –DB(12) – Data 12 +DB(13) + Data 13 –DB(13) – Data 13 +DB(14) + Data 14 –DB(14) – Data 14 +DB(15) + Data 15 –DB(15)

  • Page 109: Ide Port

    SCSI B port. A yellow label marked “IDE” has been placed next to the IDE port to prevent user misplacement of the IDE cable (see Figure A-9). RESET Baseboard Figure A-9. Ultra320 SCSI B and IDE Ports on the TA64 Front Panel A-13 Themis Computer...

  • Page 110: Table A-10 Ide Port Connector Pin Signals

    TA64 Hardware Manual Table A-10. IDE Port Connector Pin Signals Signal Description Signal Description Ground IDE_RST_L Reset IDE Ground Ground IDE_D8 Host Data 8 IDE_D7 Host Data 7 IDE_D9 Host Data 9 IDE_D6 Host Data 6 IDE_D10 Host Data 10...

  • Page 111: Pmc Module Slot 0

    Connector Type: 2-row, 64 Pin (Female), 3 required Manufacturer; Part: AMP; 120528-1 PMC Module slot 0 has no I/O through the VME P2 connector of the TA64. The connector used for installation is shown in Figure A-10; three connectors are required on the top side of the TA64 PCB to install a PMC Module.

  • Page 112: Ta64 Leds

    System is up a—If the VME Master LED is ON, the TA64 currently owns the VME bus. This does not mean that the TA64 is accessing the VME bus, however. If the TA64 is set to VME RWD (Release When Done) mode, it releases VME ownership after each VME cycle.

  • Page 113: A.3 Pmc/Xmc Carrier Boards

    C signals available as P2 option Note: The TA64 does not support PCI Express; hence, an XMC Module cannot be installed in the TA64 Module slot. Moreover, if the TA64 is attached to a 2P2 PMC/XMC Carrier Board (see Appendix C, “Front-Panel I/O Connections and LEDs”) that has an XMC Module installed, the XMC Module will not be support-...

  • Page 114: Figure A-11 The 2P2 Pmc/Xmc Carrier Board (Top And Bottom Views

    PMC/XMC Module Slot 1 64-bit pins Jn4 Connector (J14) User I/O Top View To Baseboard (TA64) 114-pin Plug Connector (Mictor) Not installed for TA64 PCI Express Bottom View Figure A-11. The 2P2 PMC/XMC Carrier Board (Top and Bottom Views) A-18 Themis Computer...

  • Page 115: Figure A-12 Ta64 Paddle Board I/O Connections (Top-Side View

    A—Connector Pinouts and LED Indicators P2 Paddle Board P2 Paddle Board Figure A-12 shows the I/O connectors, described in the following sections, that are mounted on the TA64 P2 Paddle Board. C Connector Audio In To VME 3-Row VME P2 Connector...

  • Page 116: Figure A-13 Paddle Board Ultra320 Scsi Port A Connector Pinout

    TA64 Hardware Manual A.4.1 Ultra320 SCSI Port A Connector Connector Type: High-density, 68 Pin (Female), Shielded Subminiature-D Manufacturer; Part: AMP; 749069-7 The 68-pin (female) Ultra320 SCSI Port A is single-ended (SE) for 3-row P2 con- nectors, and low-voltage differential (LVD) for 5-row P2 connectors. Figure A-13 shows the connector pinout;...
  • Page 117 BUSY_H BUSY_L ACK_H ACK_L RST_H RST_L MSG_H MSG_L SEL_H SEL_L CD_H CD_L REQ_H REQ_L IO_H IO_L DAT_H8 DAT_L8 DAT_H9 DAT_L9 DAT_H10 DAT_L10 DAT_H11 DAT_L11 a—“H” indicates an active high signal, and “L” indicates an active low signal. A-21 Themis Computer...

  • Page 118: A.4.3 Floppy-Drive Connector

    TA64 Hardware Manual A.4.3 Floppy-Drive Connector Connector Type: 34-pin (2x17) Connector (Male), End-Locks (not installed) Manufacturer; Part Number: 3M; 3431-6002 A pinout of the 2-row (2x17 pins), in-line, male floppy-drive connector is shown in Figure A-15, with connector-pin signals described in Table A-14.

  • Page 119: A.4.5 Stereo Audio In/Out Connectors

    The dual stereo (L/R) audio connectors on the front edge of the P2 Paddle Board are shown in Figure A-17. Stereo Stereo In Jack Out Jack Front View Paddle Board Edge Figure A-17. Dual Stereo Audio Connector A-23 Themis Computer...

  • Page 120: Figure A-18 Ps/2 Mini-Din Connector Pinout

    PS/2 Mini-DIN Connector-Pin Signals PS/2 Signal PS2_MOUSE_Data PS2_KBD_CLK PS2_KBD_Data PS2_MOUSE_CLK Caution: A series of solder beads must be configured before the TA64 Paddle Board keyboard/mouse connector can be enabled. See Figure A-7 on page A-10 for explicit settings. A-24 Themis Computer...

  • Page 121: Figure A-19 Paddle Board Serial A/B And C/D Connector Pinout

    Manufacturer; Part: ITT Cannon; MDSM-30PE-Z33-VR22 Themis Cable P/N: 108113 (optional) The TA64 P2 Paddle Board contains four serial ports (A, B, C, and D) on its front edge, with Port B offering modem support (see Figure A-19 for a connector pinout, and Table A-17 for pinout designations).

  • Page 122: Figure A-20 Dual Usb Ports C And D Connector Pinout

    Connector Type: Type A, Dual Stacked (version 1.1) Manufacturer; Part: AMP; 787617-4 Dual USB Ports C (USB2) and D (USB3) are installed on the front edge of the TA64 Paddle Board. A connector pinout for this stacked connector is given in Figure A-20, and connector-pin signals are described in Table A-18.
  • Page 123 Board (Socket Receptacle is mounted onto the Baseboard) Manufacturer; Part Number: Samtec; QSH-090-01-LD-A-K (Socket) The custom Memory Module is installed onto the TA64 with one connector (see Figure A-21). Caution: Because of the VME Specification requiring a 0.8-inch interboard sepa- ration (see Figure 1-2 on page 1-4) between VME slots, only one Memory Module can be installed onto a TA64 Baseboard (stacking is not supported).
  • Page 124 TA64 Hardware Manual A-28 Themis Computer...

  • Page 125: B.1 Field-Configurable

    B.1.1 TA64 Jumper Pins Jumper pins are found only on the top side of the TA64 and are described in Table B-1 on page B-2. In Table B-1, an ON jumper position means the jumper is installed, shorting the pins and completing the circuit.

  • Page 126: Table B-1 Ta64 Jumper-Pin Settings (Top Side)

    Transmit outgoing VME reset (SYSRST) to VME backplane. DO NOT transmit outgoing VME reset (SYSRST) to VME backplane. Enable the TA64 Universe II to receive the incoming VME reset from backplane. Disable the TA64 Universe II to receive the incoming VME reset from backplane.

  • Page 127: B.1.2 Pmc/Xmc Carrier Board Jumper Pins

    Paddle Board b—Low-Voltage Differential. c—Single-Ended. Figure B-1, page B-4, shows the location of jumpers on the TA64. In Figure B-1, jumper pin 1 is identified with a square and a triangle. B.1.2 PMC/XMC Carrier Board Jumper Pins...

  • Page 128: Figure B-1 Ta64 Jumper-Pin Locations (Top Side

    TA64 Hardware Manual VME P1 U106 Legend Jumper Jumper Pin 1 JP5 JP12 JP11 JP10 VME P2 Top Side Figure B-1. TA64 Jumper-Pin Locations (Top Side) Themis Computer...

  • Page 129: B.2 Factory-Configurable

    B.2.1 TA64 Solder Beads Solder beads are found only on the bottom side of the TA64 and are described in Table B-3. In Table B-3, if no pin number is given, only 2 solder pins exist. If there are 3 solder pins, the two pins listed are shorted together.

  • Page 130: Table B-4 Ps/2 And Usb Protocols And Connectors

    TA64 Hardware Manual Table B-3. TA64 Solder-Bead Settings (Bottom Side) (Continued) Solder Setting Description Bead Short 1–2 Front-Panel DIN-8 only—PS/2 is enabled on the front-panel DIN connector. SB14 Front-Panel DIN-8 only—USB A (USB0) and USB B (USB1) are enabled on the Short 2–3...

  • Page 131: Figure B-2 Ta64 Solder-Bead Locations (Bottom Side

    2 & 3 = Actual location of solder beads = Description of solder beads SB21 VME P1 SB22 SB10 SB23 SB16 SB15 SB17 SB14 SB18 VME P2 SB12 SB11 SB13 SB20 Bottom Side Figure B-2. TA64 Solder-Bead Locations (Bottom Side) Themis Computer...

  • Page 132: B.2.2 Memory Module Solder Beads

    There are no solder beads on the TA64 Memory Module. B.2.3 PMC/XMC Carrier Board Solder Beads For more detailed information on Themis PMC/XMC Carrier Boards, including sol- der beads, refer to the PMC/XMC Carrier Board Manual, Themis P/N 112826-020. Themis Computer...

  • Page 133: C.1 Introduction

    Introduction This appendix contains diagrams of all front panels (faceplates) for each possible model configuration of the TA64. It is intended as a reference to I/O and monitoring functions. See Table C-1 for a list of TA64 models. Caution: The PCI address of a PMC Module is not necessarily the same as the PMC Module slot number.

  • Page 134: C.1.1 Front-Panel Dimensions

    • Triple-E-type handles, which aid only in the extraction of the PC board from the VME backplane connectors When a PCB board product such as the TA64 is shipped from Themis, VME64-type handles will be installed unless the customer specifies a different handle such as the Triple E.

  • Page 135: Figure C-1 Pmc/Xmc Carrier Board Handles

    Placement of Mating Pins on VME64-type Handles TA64 Front Panels This section contains descriptive graphics of the front-panel I/O connections for each TA64 model configuration listed in Table C-1 on page C-1 (see Figure C-3, page C-4, through Figure C-5, page C-6). Themis Computer...

  • Page 136: C.2.1 Ta64/1—Baseboard Only

    TA64 Hardware Manual C.2.1 TA64/1—Baseboard Only Speed (10/100/1000 Mbit/sec) (Yellow, see Table C-2, page C-8) Gigabit Ethernet A VME STATUS SLAVE Link Status LEDs VME STATUS (Green = Signal Detected) SLAVE SYS FAIL MSTR Serial A SYS FAIL MSTR Serial B...

  • Page 137: C.2.2 Ta64/2P2—Baseboard And 2-Pmc Carrier Board

    * Line In/Out and Mic/Headphones PMC Module 0 are switchblade through PMC Module 1 on-board solder beads. PMC Module 2 TA64 See Table B-5, page B-9. Baseboard 2P2 PMC/XMC Carrier Board Figure C-4. TA64 and 2P2 PMC/XMC Carrier Board Themis Computer...

  • Page 138: Figure C-5 Ta64 And 2P3 Pmc/Xmc Carrier Board

    Front-Panel description. PMC Module 1 PMC Module 0 TA64/3G2 Addressing PCI Address PMC Module 0 PMC Module 1 PMC Module 2 TA64 PMC Module 3 Baseboard 2P3 PMC Carrier Board Figure C-5. TA64 and 2P3 PMC/XMC Carrier Board Themis Computer...

  • Page 139: Figure C-6 Ta64 Front-Panel Leds

    SLAVE SYS FAIL MSTR C / D / E / F (left to right) SYS STATUS USER ENBL SH DN PWR OK G / H / I / J (left to right) RESET Figure C-6. TA64 Front-Panel LEDs Themis Computer...

  • Page 140: Table C-2 Front-Panel Led Interpretation

    Shutdown Orange TA64 system is shutting down System Status Power OK Yellow All power on TA64 boards is operational Enable Green TA64 system is up a—“ON” or “OFF” means the LED is ON or OFF for 300 ms. Themis Computer...

  • Page 141: D.1 Ta64 Baseboard

    Appendix Board Diagrams The following sections of this appendix contain diagrams of the various boards of the TA64. It is intended as a quick reference to component and connector identifica- tion. TA64 boards included are: • Baseboard • 2P2 PMC/XMC Carrier Board and 2P3 PMC Carrier Board •...
  • Page 142 W83627F-AW PMC Module VME P2 Winbond Ultra320 SCSI Controller Sharp LHF00L01 LSI Logic LPC Flash 53C1030-456BGA Memory 3.3V key PMC Module Outline Top Side PMC Module Voltage Key Figure D-1. TA64 Front-Panel, Component, and Connector Diagram (Top View) Themis Computer...

  • Page 143: Figure D-2 2P2 Pmc/Xmc Carrier Board Component/Connector Diagram

    D—Board Diagrams TA64 P2 Paddle Board Flash Memory (Intel JS28F640J3D75) PMC/XMC Module PCI to Local CPLD Bus Bridge VME P1 (Xilinx (PLX Technology XCR3256XL) PCI9656) Ethernet B 10/100/1000 Baseboard & Ethernet PCI-to-PCI Graphics Card Audio Out (Broadcom Bridge Mictor Connectors...

  • Page 144: Figure D-3 2P3 Pmc Carrier Board Component/Connector Diagram

    TA64 Hardware Manual P2601 PMC Module VME P1 PMC Carrier Board Riser PMC Module Connectors (underneath on solder side) P0602 P0501 P2702 Secondary PCI-to-PCI Bridge (Intel 21154) U0901 PMC Module VME P2 Top Side P0501 connects to the 3.3V key 5V key Baseboard;...

  • Page 145: Figure D-4 Ta64 Paddle Board Connector Diagram (Top-Side View

    USB C (USB2) USB D (USB3) Serial A Serial B Serial C Serial D Ultra320 SCSI A Floppy Drive GPIO * A 5-Row TA64 Paddle Board is also available. Figure D-4. TA64 Paddle Board Connector Diagram (Top-Side View) Themis Computer...

  • Page 146: Table D-1 Paddle Board Connector J0206 Pinout

    TA64 Hardware Manual Table D-1. Paddle Board Connector J0206 Pinout Function Function High-temperature trip GROUND GROUND Software alarm Power fail GROUND Caution: Connect the Paddle Board to the P2 connector of the VME Backplane only. Connection to the P1 connector will cause operational malfunctions as well as possible damage to both the Baseboard and the Paddle Board.
  • Page 147 The device tree includes several device nodes (PCI bus is a device-node). DMA: Direct Memory Access. A facility of some architectures that allows a periph- Themis Computer...
  • Page 148 TA64 Hardware Manual eral to read and write memory without intervention by the CPU. DMA is a lim- ited form or bus mastering. DSR: Data set ready (DCE to DTE). DTE: Data terminal equipment (a computer, terminal, or printer, for example).
  • Page 149 Probing: A process implemented in the firmware and software to identify onboard hardware devices and add-on cards on the PCI bus. The probing process cre- ates the device-tree. R0: An abbreviation used to indicate “Read Zero.” When software attempts to read Themis Computer...
  • Page 150 TA64 Hardware Manual an R0 area, zero will be returned. Writes to R0 are not permitted. RC (RCK): Receiver clock input (external). Read Cycle: A VMEbus cycle used to transfer 1, 2, 3, 4, or 8 bytes from a Slave to a master.
  • Page 151 VME: Versa Module Europe. VME is a standard for chassis (rack) based industrial computer systems based on 32- or 64- bit system architectures. Write Cycle: A VMEbus cycle used to transfer 1, 2, 3, 4 or 8 bytes from a Master to a Slave. Themis Computer...
  • Page 152 TA64 Hardware Manual Themis Computer...
  • Page 153 1. The TA64 does not support PCI Express; hence XMC Modules are not supported. 2. TGA3D/3D+ Graphics Boards are not supported by the TA64. Instead, a TGA-7000 PMC Graphics Module is recommended. 3. New 2P2 PMC/XMC Carrier Board (P/N 112794-001) only; the standard version 2P2 PMC Carrier Board is not compatible.
  • Page 154 TA64 Hardware Manual Caution: A new 2P2 PMC/XMC Carrier Board (Themis P/N 112794-001) has been designed to operate with the TA64 system, which does not support the original 2P2 PMC Carrier Board. DO NOT ATTEMPT to operate the original 2P2 PMC Carrier Board with the TA64.

  • Page 155: Figure F-1 Ta64 Vme Slot Configurations

    Graphics Cards Graphics Cards Baseboard * Audio I/O Audio I/O Audio I/O Front Panel Baseboard 1 PMC slot Top View VME Slot 1 Approved PMC Cards supported by Themis: 4/2006 VME Slot: Figure F-1. TA64 VME Slot Configurations Themis Computer...
  • Page 156 TA64 Hardware Manual Themis Computer...

  • Page 157: Index

    Environmental Specifications 2-9 BCM5703 Gigabit Ethernet Controller- Error Correction Code (ECC) 3-8 /Transceiver 3-5 Ethernet (TPE) port A-5 BIOS 3-8, 3-9 Ethernet Connector Pin Signals and LEDs A-5 Board type 1-1 Ethernet, Gigabit 1-9 Boot Path Control register 5-6 Index-1 Themis Computer...
  • Page 158 IDE Port 1-10, A-13 WATCHDOG_1_STATUS register 5-15 In Case Of Difficulties xxiv WATCHDOG_2_COUNTER register 5-16 Inserter/Extractor Handles C-2 WATCHDOG_2_LIMIT register 5-16 Integration Kit, TA64 1-6 WATCHDOG_2_STATUS register 5-16 Intended Audience xix WATCHDOG_INT_MASK register 5-17 ISR Control register 5-6 Watchdog-Related Registers 5-3...
  • Page 159 PMC Module Slot 0 connector A-15 Serial Ports A, B, C, and D 1-6 PMC Module slot 1 A-17 Ultra320 SCSI A 1-6 PMC Module slot 2 A-17 USB C (USB2) 1-6 PMC Module slot 3 A-17 USB D (USB3) 1-6 Index-3 Themis Computer...
  • Page 160 TA64 Hardware Manual PMC/XMC Carrier Board A-17 SCSI Port A Connector PMC/XMC Carrier Board Jumper Pins B-3 Paddle Board A-20 PMC/XMC Carrier Board Manual, Themis P/N SCSI Port A Connector Pinouts 112826-020 2-3 Paddle Board A-21 PMC/XMC Carrier Boards 2-3, 3-9...
  • Page 161 TA64 Front Panels C-3 USB Ports C and D 1-11, 2-4, A-26 TA64 Integration Kit 1-6 USB Ports C and D Connector Pinout A-26 TA64 Paddle Board, 3-Row 1-6 USB Protocols A-10 TA64 Paddle Board, 5-Row 1-6 User-defined 16-position rotary switch A-17...
  • Page 162 TA64 Hardware Manual VMEbus 3-4 Address Translation 4-11 Configuration 4-2 Fields for VMEbus Slave Image 4-10 First Slot Detector 4-5 Interface 4-2 Slave 4-2 Slave Image PCI Bus Fields 4-10 System Controller 3-4 VMEbus arbitrator 4-6 VMEbus Master 4-9 Warranty xxiv...
  • Page 163 Place Stamp Here Themis Computer 47200 Bayside Parkway Fremont, CA 94538 Attn: Publications Department Fold here; tape at top to seal...
  • Page 164 Reader Comment Card We welcome your comments and suggestions to help improve the TA64 Hardware Manual. Please take time to let us know what you think about this manual. • Information provided in the manual was complete. Agree___ Disagree___ Not Applicable___ •...

Table of Contents