Themis TA64 Manuals

Manuals and User Guides for Themis TA64. We have 1 Themis TA64 manual available for free PDF download: Hardware Manual

Themis TA64 Hardware Manual

Themis TA64 Hardware Manual (164 pages)

Brand: Themis | Category: Motherboard | Size: 4 MB

Table of Contents

Table of Contents
5
How to Use this Manual

17
- Intended Audience
  19
1 TA64 Installation

25
2 TA64 Features and Specifications

39
3 Hardware Overview

49
- Baseboard
  49
  - Turion64 Processor
    49
  - Hypertransport Technology
    50
    
    3.1.2.1 AMD 8131 Hypertransport PCI-X Tunnel
    50
    
    3.1.2.2 AMD 8111 Hypertransport I/O Hub
    51
  - Tundra CA91C142 Universe II
    52
  - LSI53C1030 Dual Ultra320 SCSI Controller
    52
  - BCM5703 Gigabit Ethernet Controller/Transceiver
    53
  - Winbond W83627F LPC Super I/O
    54
  - ADM1066 Power Supervisor/Sequencer
    54
  - XR17D152 Dual UART (DUART)
    55
  - ICS950403 System Clock
    55
  - Complex PLD (CPLD)
    55
  - Fpga
    55
  - Flash Memory
    56
- Memory Subsystem
  56
- Figure 3-3 Custom Memory Module Topology (Side View)
  56
- PMC/XMC Carrier Boards
  57
- Bios
  57
4 Universe II Description

59
5 Field-Programmable Gate Array (FPGA)

79
- Introduction
  79
- VME Reset Control
  80
- Watchdog Timer
  81
  - Watchdog Timers
    81
  - Watchdog-Related Registers
    81
  - Watchdog Start/Restart
    81
- X-Bus (ISA) Flash
  82
- Register Description
  83
  - FPGA_REV Register
    83
  - Table 5-1 TA64 FPGA Register Address Map
    83
  - FPGA_REV Register 0Xfb00.0000
    83
  - Table
    83
  - ISR Control Register
    84
  - Boot Path Control Register
    84
  - Boot Path Control Register 0Xfb00.0002
    85
  - Table
    85
  - LED Control and Watchdog Log Register
    86
  - VME Reset Register
    87
  - VME Reset Register 0Xfb00.0004
    87
  - Table
    87
  - On-Board IO Setting Register
    88
  - On-Board IO Setting Register 0Xfb00.0005
    88
  - Table
    88
  - SCSI Setting Register
    89
  - SCSI Setting Register 0Xfb00.0006
    89
  - Table
    89
  - GPIN and GPOUT Register
    90
  - Reserved Register
    91
  - FPGA Interrupt Mask Register
    92
  - WATCHDOG_1_COUNTER Register
    92
  - Table 5-12 Watchdog_1_Counter Register 0Xfd00.0010
    92
  - WATCHDOG_1_LIMIT Register
    93
  - WATCHDOG_1_STATUS Register
    93
  - Table 5-13 Watchdog_1_Limit Register 0Xfd00.0014
    93
  - Table 5-14 Watchdog_1_Status Register 0Xfd00.0018
    93
  - Table
    93
  - WATCHDOG_2_COUNTER Register
    94
  - WATCHDOG_2_LIMIT Register
    94
  - WATCHDOG_2_STATUS Register
    94
  - Table 5-15 Watchdog_2_Counter Register 0Xfd00.0020
    94
  - Table 5-16 Watchdog_2_Limit Register 0Xfd00.0024
    94
  - Table 5-17 Watchdog_2_Status Register 0Xfd00.0028
    94
  - Table
    94
  - WATCHDOG_INT_MASK Register
    95
  - Table 5-18 Watchdog_Int_Mask Register 0Xfd00.0040
    95
Appendix A. Connector Pinouts and LED Indicators

97
Appendix B. Jumper Pins and Solder Beads

125
- B.1 Field-Configurable
  125
- B.2 Factory-Configurable
  129
Appendix C. Front-Panel I/O Connections and Leds

133

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