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IC BLOCK DIAGRAM & DESCRIPTION
IC102 LC78629E (DSP for a CD Player)
EFMO
1
Slice level
DEFI
Control
10
EFMIN
Syncrnous Detection
22
FSEQ
EFM Demodulation
CLV+
12
CLV
Digital Servo
13
CLV-
14
V/*P
PW
49
Subcode
SBCK
51
Separation
47
SBSY
QCRC
SFSY
50
WRQ
53
Micro-computer
Inter Fase
55
SQOUT
57
*CQCK
COIN
56
Servo Commander
54
RWC
15 16
HFL
TES
TOFF
No. Symbol I/O
Function description
Defect detection signal(DEF) input pin.
1
DEFI
I
(Must be connected to 0V when unused.)
Test input pin. A pull-down resistor is built-in.
2
TAI
I
Must be connected to 0V.
3
PDO
O
External VCO control phase comparator output pin.
4
VVSS
-
Internal VCO ground pin.Must be connected to 0V.
PLL
PDO output current adjustment resistor
5
ISET
AI
connection pin.
6
VVDD
-
Internal VCO power supply pin.
7
FR
AI
VCO frequency range adjustment.
8
VSS
-
Digital system ground pin. Must be connected to 0V.
9
EFMO
O
EFM signal output pin.
Slice level
control
10
EFMIN
I
EFM signal input pin.
Test input pin. A pull down resistor is built in.
11
TEST2
I
Must be connected to 0V.
12
CLV+
O
Disk motor control output.
Can be set to three-value output by microprpcessor command.
13
CLV-
O
Rough servo/phase control automatic switching monitor
output pin.
14
V/*P
O
Outputs a high level during rough servo and a low level.
Track detection signal input pin. This is a Schmidt input.
15
HFL
I
Tracking error signal input pin. This is a Schmidt input.
16
TES
I
Tracking off output pin.
17
TOFF
O
Tracking gain switching output pin.
18
TGL
O
Increase the gain when low.
Track jump output.
19
JP+
O
Three-value output is also possible when specified by
microprocessor command.
20
JP-
O
EMF data playback clock monitor pin.
21
PCK
O
Output 4.3218MHz when the normal-speed playback phase
command.
Synchhronization signal detection output pin. Output a high
level when the synchronization signal detected from the EFM
22
FSEQ
O
signal and the internaly generated synchronization signal range.
Peripheral circuitry 5V system power suply pin.
23
VDD
-
General-purpose 1
CONT1
I/O
24
input/output pin.
General-purpose 2
25
CONT2
I/O
input/output pin.
General-purpose 3
26
CONT3
I/O
input/output pin.
General-purpose 4
27
CONT4
I/O
input/output pin.
General-purpose 5
28
CONT5
I/O
input/output pin.
De-emphasis monitor pin.
A high level indicates playback of a de-emphasis disk,
EMPH/
29
O
General-purpose 6 output pin.
CONT6
Rest to EMPH function.
C2 flag output pin.
30
C2F
O
Digital output pin. (EIJA format)
DOUT
O
31
Test input pin.
32
TEST3
I
A pull-down resistor is built in. Must be connected to 0V.
VV
VV
PDO ISET FR
DD
SS
9
6
4
3
5
7
VCO Clock Oscillator
& Clock Control
General
PurposePort
17
20
19 58
18
34
24 25 26 27 28
29
JP-
JP+
*RES
TGL
CONT1
CONT3
CONT5
EMPH/
PCLL
CONT2
CONT4
CONT6
Controlled by serial data commands.
From the microprocessor.
Any of these that are unused must
be either set up as input pin and
connected to 0V, or set up as output
pin and left open.
TST11
TEST2
TEST4
PCK
TAI
TEST1
TEST3 TEST5
V
V
DD
SS
21
2
59 64 11 32 33 62
23
8
2K
8bits
X
RAM
C1 C2 Error Detection&
Correction Flag
Processing
Crystal Oscillator
System Generator
48
60 61 46 52 45 44 43
39 41
35
EFLG
16M
4.2M
FSX
XIN
XV
RV
DD
DD
XV
XOUT
RV
MUTEL/
SS
SS
CONT7
Output pin
No. Symbol I/O
to rest
Test input pin.
-
33
TEST4
I
A pull-down resistor is built in. Must be connected to 0V.
General-purpose I/O command identification pin.
A pull-down resistor is built in.
Used operate similarly to LC78622E connected to open or 0V.
34
PCCL
I
H ; Must be connected to general-purpose port command.
L ; Be able to all command control.
-
MUTEL/
35
O
CONT7
Lch
36
LVDD
-
one-bit
DAC
37
LCHO
O
38
LVSS
-
-
39
RVSS
-
Incertitude
40
RCHO
O
-
Rch
41
RVDD
-
one-bit
-
DAC
MUTER/
42
O
L output
CONT8
43
XVDD
-
Crystal oscillator power supply pin.
L output
O
44
XOUT
Connections for a 16.934MHz crystal oscillating circuit
ground pin.
45
XIN
I
-
46
-
Crystal oscillator ground pin. Must be connected to 0V.
XVSS
-
47
O
Subcode block synchronization signal pin.
SBSY
H output
48
EFLG
O
C1,C2,signal and double error correction monitor pin.
Incertitude
Subcode P,Q,R,S,T,U,V and W output pin.
49
PW
O
Subcode frame synchronization signal output pin.
50
O
SFSY
L output
This signal falls when the subcode are in the standby stase.
Subcode readout clock input pin. This is a Schmitt input.
51
I
SBCK
(Must be connected to 0V when unused.)
L output
Output for the 7.35kHz synchronization signal divided from
52
O
FSX
the crystal oscillator pin.
Subcode Q output standby output pin.
53
O
WRQ
Incertitude
Read/ write control input pin. This is a Schmidt input.
54
RWC
I
-
55
O
Subcode Q output pin.
SQOUT
56
I
Command, data input pin from control microprocessor.
COIN
Input for both the command input acquisition clock and the
57
I
SQOUT subcode readout clock input pin.
*CQCK
This is Schmidt input.
Input
Reset input pin.
58
I
*RES
This pin must be set low briefly after power is first applied.
Test output pin. Leave open. (Notmally output a low level.)
59
TST11
O
60
O
16.9344MHz clock output pin.
16M
61
O
4.2336MHz clock output pin.
4.2M
Test input pin. A pull-down resistor is built in.
62
TEST5
I
Must be connected to 0V.
L output
63
-
Internal circuit 3.3V system power supply pin.
VDD3V
Incertitude
Test input pin.
64
TEST1
I
A pull-down resistor is built in. Must be connected to 0V.
Incertitude
Note) The same potential must be suplied to all power supply pins, i.e., VDD,VVDD,LVDD,RVDD
and XVDD.
-
- 8 -
VDD3V
63
RAM Address
Generatorl
Interpolalation
30
Mute
Digital Output
31
Digital Attenuator
8X Over Sampling
Digital Filter
1bit DAC
L.P.F
40
37
42
38
36
RCHO
LCHO
MUTER/
LV
LV
SS
DD
CONT8
Function description
Left channel mute output pin, General-purpose 7
output pin.
Rest to MUTEL function.
Left channel power supply pin.
Left channel output pin.
Left channel ground pin. Must be connected to 0V.
Right channel ground pin. Must be connected to 0V.
Right channel output pin.
Right channel power supply pin.
Right channel mute output pin, General-purpose 8
output pin.
Rest to MUTER function.
C2F
DOUT
Output pin
to rest
-
-
H output
-
-
-
-
-
-
H output
-
-
-
Incertitude
Incertitude
Incertitude
Incertitude
-
Incertitude
Incertitude
-
Incertitude
-
-
-
L output
Clock output
Clock output
-
-
-
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