Only For Training And Service Purposes - LG KF700 Service Manual

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3.10.5 Camera Interface
KF700 Installed a 3M Pixel and 0.3Mega Camera. Below [Fig. 3.18] shows the camera board to board
connector and camera I/F signal.
ISP_SENS_I2C_SCL
ISP_SENS_I2C_SDA
VGA_CAM_PWDN
CAM_DATA(0)
CAM_DATA(1)
CAM_DATA(2)
CAM_DATA(3)
CAM_DATA(4)
CAM_DATA(5)
The MEGA Camera module is connected to Main PCB with 20pin Board to Board connector Its
interface is dedicated camera interface port in ISP chip. The camera port supply 24.576MHz master
clock to camera module, vertical sync signal, horizontal sync signal, reset signal and 8bits data from
camera module. The camera module is controlled by I2C port from ISP chip.
The VGA Camera module is connected to FPCB with 20pin Board to Board connector (AXK720147G).
Its interface is dedicated camera interface port in MSM6280. The camera port supply 24.576MHz
master clock to camera module and receive 24.576MHz pixel clock (30fps), vertical sync signal,
horizontal sync signal, reset signal and 8bits data from camera module. The camera module is
controlled by I2C port from MSM6280.
Copyright © 2008 LG Electronics. Inc. All right reserved.

Only for training and service purposes

CN500
G1
G2
1
20
2
19
CLKN
3
18
CLKP
4
17
5
16
DATAN
6
15
DATAP
7
14
XSHUTDOWN
8
13
9
12
10
11
G3
G4
AXK7L20227G
D500
PG05DBTFC
CAM_MCLK
CAM_PCLK
[Fig. 3.18] Camera PCB Board to Board Connector
VREG_CAM_1.8V
VREG_CAM_2.8V
C512
ISP_SENS_MCLK
0.1u
FB505
FB503
FB506
L500
47nH
LC Filter for power noise from GSM RF
VREG_CAM_2.8V
VREG_CAM_1.8V
C100
0.1u
CN101
1
20
2
19
3
18
4
17
I2C_SCL
5
16
6
15
7
14
8
13
9
12
10
11
- 55 -
3. TECHNICAL BRIEF
VREG_3M_AF_2.8V
FB502
BLM15AG100PN1
C513
C514
0.1u
2.2u
C519
220p
C101
0.1u
VGA_CAM_RESET_N
I2C_SDA
CAM_HSYNC
CAM_VSYNC
CAM_DATA(7)
CAM_DATA(6)
LGE Internal Use Only

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