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1
RFCLK_I(1:0)
PUSL(7:0)
0
4
R2815
3
1
1k0
5
C2823
1n0
6
GND
0
4
5
1
GND
2
A
0
1
RFCTRL_I(8:0)
2
3
4
5
RFCONV_I(11:0)
6
7
9
8
1
2
0
TXC(2:0)
CBUS(3:0)
0
1
ACI(1:0)
2
0
1
DIG_AUDIO(5:0)
AudioCLK
DAUDIO(2:0)
0
B
AuxMicData
1
3
RXRESET (NOT USED)
DMIC_EN
2
6
7
8
PCM(3:0)
USB_CMT(8:0)
1
0
2
3
4
J2803
5
6
PUEN
0
1
2
INT_SIM(5:0)
0
1
2
3
4
5
JTAG(6:0)
ETM(16:0)
0
C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Bypass for CPU
EMINT(1:0)
VCORE
VCORE
C2802
C2803
C2804
C2805
C2806
C2807
VCORE
100n
100n
100n
100n
100n
100n
R2800
VCORE
GND
10R
VCORE
D
VIO
C2800
100n
GND
VIO
C2810
C2811
C2812
C2813
C2814
100n
100n
100n
100n
100n
VIO
C2801
GND
100n
GND
1
2
D2800
RAP3GS_V2.0E-PA
E3
U21
GND
TMAct
GenIO0
984_LDO_STBY
V21
GenIO1
1
0
J2800
G4
U20
2
RFClkP
GenIO2
SD_FBCLK
1
J2801
H4
V22
3
RFClkN
GenIO3
SD_DATA_DIR123
B3
W21
SleepX
GenIO4
SD_HOT_SWAP
4
D7
W20
5
SleepClk
GenIO5
C4
W22
6
PURX
GenIO6
SD_WP
AC15
V23
SMPSClk
GenIO7
SD_En
7
Y4
Y20
8
SysClk
GenIO8
SD_Data1
D3
Y21
9
APESleepX
GenIO9
SD_CMD
N4
AA21
TXReset
GenIO10
SD_Data2
10
N7
AA19
11
TXP
GenIO11
SD_Data_Dir
P3
AA20
12
TXA
GenIO12
SD_CMD_Dir
N2
Y19
RX1
GenIO13
SD_CLK
13
R3
AA18
14
RX2
GenIO14
SD_Data3
K4
R21
15
TxIP
GenIO15
SD_Data4
L4
H21
0
TxIN
GenIO16
Data0
G11
F21
1
TXQP
GenIO17
Data1
G12
Y9
2
TXQN
GenIO18
Data2
J3
U9
3
RxIP
GenIO19
Data3
J2
AA8
4
RxIN
GenIO20
Data4
K7
AA7
5
RxQP
GenIO21
Data5
J7
AC9
6
RxQN
GenIO22
Data6
G9
Y6
7
VrefP
GenIO23
Data7
G8
AB8
8
VrefN
GenIO24
WRX
GND
G10
Y5
9
Iref1
GenIO25
TE
AC4
10
GenIO26
CSX
AA5
11
GenIO27
RDX
D19
AA4
12
TxCDa
GenIO28
DCX
B19
AA6
TxCDaCtrl
GenIO29
BT_WAKEUP
D18
AA13
TxCClk
GenIO30
SDA
GenIO31
Y13
SCL
R22
0
GenIO32
Keyb_Row0
V20
1
GenIO33
Keyb_Row1
Y18
2
GenIO34
Keyb_Row2
AB16
3
GenIO35
Keyb_Row3
N21
6
GenIO36
Keyb_Col0
W2800
Y14
T17
7
CBusClk
GenIO37
Keyb_Col1
W2801
U12
P21
8
CBusDa
GenIO38
Keyb_Col2
W2802
AA14
Y16
9
CBusEn1X
GenIO39
Keyb_Col3
G17
AA17
10
ACIRx
GenIO40
Keyb_Col4
B17
N22
4
ACITx
GenIO41
Keyb_Row4
M23
5
GenIO42
Keyb_Row5
1
AA10
U15
EarDataL
GenIO43
2
F23
Y15
EarDataR
GenIO44
3
AC13
AA15
MicData
GenIO45
0
U10
L17
AudioClk
GenIO46
TE_SUB
4
AA12
N17
PMARP
GenIO47
CSX_SUB
5
Y10
J21
PMARN
GenIO48
J20
GenIO49
984_CAM_REG_EN
AA9
GenIO50
HALL_SENSOR
C12
H20
RFBusClk
GenIO51
N3
RFBusDa
GenIO52
R1
984_LDO_EN
M1
B21
RFBusEn1X
GenIO53
BT_CLK_REQ
E22
GenIO54
984_CAM_PDN
GenIO55
D21
LCD_RESETX
0
N20
R2
I2SSCLK
GenIO56
GPS_INT_CLK
1
M17
R4
I2SWS
GenIO57
GPS_EN_RESET
2
AB13
T4
I2SSD1
GenIO58
3
AA16
P4
I2SSD2
GenIO59
BT_UART_RX
P7
GenIO60
BT_UART_TX
Y3
D17
USBVP_FRX
GenIO61
GPS_TIMESTAMP_RDY
AA3
W1
USBVM_Clk
GenIO62
SPI_DAIN
W2
C17
USBRCV_FRX2
GenIO63
SPI_DAO
Y7
T3
USBVO
GenIO64
BT_RESETX
W3
Y12
USBFSE0_FTX
GenIO65
VPPLOCK
V4
USBOEX
V2
K17
USBDSyncClk
GenIO67
BT_UART_WAKEUP
J22
GenIO68
984_CAM_CLK
C16
U4
SIMClk1
GenIO69
BT_UART_CTS
F22
T7
SIMIOCtrl1
GenIO70
BT_UART_RTS
G20
R7
SIMIODa1
GenIO71
AuxMicData
G15
GenIO72
SPI_Clk
F4
JTClk
GenIO73
U7
SPI_CS
F3
JTrst
D5
C20
2
JTDI
SpecialIO0
3
D8
JTMS
SpecialIO1
C19
H3
D16
0
JTDO
SpecialIO2
E4
D15
1
EMU0
SpecialIO3
B9
A1
ETMClk
NC_BGA
C9
A2
ETMPkt0
NC_BGA
A7
A22
ETMPkt1
NC_BGA
A5
A23
ETMPkt2
NC_BGA
C15
AB1
ETMPkt3
NC_BGA
C5
AB23
ETMPkt4
NC_BGA
D14
AC1
ETMPkt5
NC_BGA
B12
AC2
ETMPkt6
NC_BGA
C6
AC22
ETMPkt7
NC_BGA
D10
AC23
ETMSync
NC_BGA
C10
B1
ETMPipe0
NC_BGA
B10
B2
ETMPipe1
NC_BGA
D9
B23
ETMPipe2
NC_BGA
C8
ETMSyncB
A4
E20
ETMPipeB0
VDDARX
D6
F20
ETMPipeB1
VSSARX
GND
A3
K3
ETMPipeB2
VDDATX
M3
VSSATX
GND
0
D20
L3
RetuInt
VSSASUB
GND
1
H22
TahvoInt
C2808
C2809
E1
100n
100n
VDDCORE1
VCORE
U13
M4
VDDDSP1
VDDCORE2
GND
U16
VDDDSP2
VDDCORE3
L7
R20
W4
VDDDSP3
VDDCORE4
U14
U8
VSSDSP1
VDDCORE5
U17
AB19
VSSDSP2
VDDCORE6
P20
P17
VSSDSP3
VDDCORE7
GND
J17
K20
VDDMCU1
VDDCORE8
C13
D13
VDDMCU2
VDDCORE9
G21
D11
VSSMCU1
VDDCORE10
G16
G13
VSSMCU2
VDDCORE11
GND
K22
C18
VDD1
VDDCORE12
U11
C3
VDD2
VSSCORE1
J1
VSSCORE2
M7
VDDSIO1
VSSCORE3
J4
AB4
C14
VDDSIO2
VSSCORE4
Y11
V3
VDDSIO3
VSSCORE5
Y17
Y8
VDDSIO4
VSSCORE6
T20
AA11
VDDSIO5
VSSCORE7
R17
AC19
VDDSIO6
VSSCORE8
H17
M20
VDDSIO7
VSSCORE9
C21
L20
VDDSIO8
VSSCORE10
D12
D22
VDDSIO9
VSSCORE11
D4
VDDSIO10
VSSCORE12
B15
G3
C11
THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
VDDA
VSSCORE13
H7
G14
VSSA
VSSCORE14
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
GND
GND
2
3
4
MMC_CMT(16:0)
CAM_CTRL_CMT(7:0)
2
3
984_LDO_STBY
STACKED RAP+MEM
984_LDO_EN
5
0
984_CAM_CLK
6
984_CAM_PDN
984_CAM_REG_EN
1
14
TE_SUB
15
CSX_SUB
20
LCD_RESETX
MESSI_CMT(25:0)
VIO
R2804
R2805
2k7
2k7
I2C(1:0)
1
0
KEYB_CMT(20:0)
GEN_CTRL_CMT(20:0)
J2805
1
2
J2804
0
DMIC_EN
GPS_CMT(3:0)
0
GPS_INT_CLK
1
GPS_EN_RESET
GPS_TIMESTAMP_RDY
2
J2802
2
LPRF_CMT(7:0)
1
7
BT_CLK_REQ
0
6
BT_WAKEUP
5
SPI_CMT(3:0)
4
3
SPI_DAO
2
1
SPI_DAIN
0
3
CCP_CMT(3:0)
VPP
R2801
VPPLOCK
VRFC
4k7
VRFC
C2815
100n
GND
GND
FCI_CMT(3:0)
NAND(15:0)
AUDIOCTRL(5:0)
IRDA_CMT(2:0)
Copyright (C) Nokia Corporation. All rights reserved.
This document is property of Nokia Corporation
3
4
5
VIO
R2803
R2802
4k7
4k7
D2800
RAP3GS_V2.0E-PA
AC10
0
AB11
AB9
SDRCKE
1
M21
AC8
SDRCLK
2
L23
AB7
SDRCLKX
3
AB15
AB22
SDRWEX
4
AB20
AB21
SDRCASX
5
AC20
AC21
SDRRASX
6
U23
SDRAd
AB18
SDRLDQS
7
E21
AC18
SDRUDQS
8
L22
AB17
SDRDQMU
9
P22
AB10
SDRDQML
10
11
AB14
AA1
AB12
FlsCS2X
12
C1
AC12
FlsADVX
13
A14
AC11
FlsClk
14
D1
FlsRSTX
F2
FlsWEX
E2
U22
FlsWaitX
0
D2
T23
FlsOEX
1
N1
T22
FlsCSX
2
R23
3
U2
T21
TOP_VCCnor1
4
VIO
V1
N23
TOP_VCCnor0
5
AC3
P23
TOP_VCCmm0
6
AC5
M22
TOP_VCCmm1
7
SDRDa
U1
L21
TOP_Vpp
8
VPP
K21
9
F1
K23
TOP_Vccq0
10
VIO
G1
J23
TOP_Vccq1
11
H23
12
B20
G22
TOP_Vdd0
13
VDRAM
A21
G23
TOP_Vdd1
14
A20
TOP_Vdd2
15
E23
AA23
TOP_Vdd3
AC7
C2
TOP_Vdd4
0
AC6
TOP_Vdd5
1
B6
C7
2
W23
B7
TOP_Vddq0
3
VIO
A19
B8
TOP_Vddq1
4
A18
B11
TOP_Vddq2
5
A16
A12
TOP_Vddq3
6
B18
B13
TOP_Vddq4
7
A17
B4
TOP_Vddq5
8
B5
9
AC14
A6
TOP_Vssd0
10
AC16
A8
TOP_Vssd1
11
AA22
ExtAdDa
A9
TOP_Vssd2
12
B16
A10
TOP_Vssd3
13
A15
A11
TOP_Vssd4
14
B14
A13
TOP_Vssd5
15
T2
16
G2
Y1
TOP_Vss0
17
H2
P2
TOP_Vss1
18
H1
TOP_Vss2
19
U3
K1
P1
TOP_Vss3
20
K2
T1
TOP_Vss4
21
L1
TOP_Vss5
22
Y2
L2
M2
TOP_Vss6
23
AA2
24
B22
TOP_Vssq0
C23
AB2
TOP_Vssq1
GenIO66
C22
AB5
TOP_Vssq2
TOP_INT
D23
AB6
TOP_Vssq3
TOP_/CEd
Y23
AB3
TOP_Vssq4
TOP_/CEmm
Y22
AC17
TOP_Vssq5
TOP_SDRAdres
GND
GND
VDRAM
C2816
C2817
C2818
100n
100n
100n
GND
Bypass for memory
VIO
C2819
C2820
C2821
C2822
100n
100n
100n
100n
GND
Name
RAPStack
5
6
A
D2801
S72NS512PE0KJFLG
COMBO 32Mx16 NOR
A1
16Mx16 DDR DRAM
4347128|NONET
B
C
D
6
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