Vizio VX42L HDTV10A Service Manual page 38

18. DRAM Controller:
1. Supports 64Mb to 1Gb DDR DRAM devices
2. Configurable 16/32-bit data bus for MT5372
3. Supports DDR1-333, DDR1-400, DDR2-533, DDR2-667 JEDEC specification
compliant SDRAM
19. Audio DSP:
1. Supports Dolby Digital AC-3 decoding (ATSC)
2. MPEG-1 layer I/II decoding (DVB)
3. MPEG-2 AAC decoding (Japan)
4. DV audio decoding
5. MP3 decoding
6. Dolby Pro-logic II
7. Audio output: 7.1ch + 2ch (down mix)
8. Pink noise and white noise generators
9. Equalizer
10. Bass management
11. 3D-surround processing with virtual surround
12. Audio and video lip synchronization
13. Supports reverberation
14. Automatic volume control
15. One SPDIF out
16. 5-bit data (10-channel) I2S out interface up to 24-bit resolution per channel
20. Peripherals:
1. Two UARTs with a transmitter and a receiver FIFO, one of them has a hardware
flow control
2. Three serial interfaces, one is the master for general purposes, one is the master
for the HDMI key, and the remaining one is the slave for the HDMI EDID data
4. Three PWMs
5. IR blaster and receiver
6. Real-time clock and watchdog controller
7. Smart Card reader
8. PCMCIA/POD/CI interfaces
9. Supports three NOR flash or one NOR and one NAND flash
10. Supports CableCARD host control bus
21. IC Outline:
1. The MT5372 is delivered in 588-ball BGA package
2. 3.3V/1.2V and 2.5V for DDR1; 1.8V for DDR2
CONFIDENTIAL – DO NOT COPY Page 7-7
File No. SG-0211