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FUNCTIONAL BLOCK DIAGRAM
Anolog
Triple
RGB
ADC
Digital
TMDS
TMDS
RX
Input
Video
YUV
[8-bits]
SYSTEM BLOCK DIAGRAM
Composite
PIN FUNCTION
INPUT
Dna
Dnb
L
L
L
H
H
L
H
H
PIN CONFIGURATION
GM5020
Serial I/F
Host
Micro-
Interface
processor
YUV to RGB
Converter
Image
Caputure/
Brightness,
Measure.
Contrast,
ment
Hue,
Saturation
Anolog
RGB
DVI
Video
Decoder
S-Video
74F08D 14P
OUTPUT
Qn
L
L
L
H
GENESIS 292P
SDRAM/I/F
Frame Store
Interface
Zoom/
Frame Rate
Shrink/
Conversion
Filter
Control
Frame Buffer
(SDRAM/SGRAM)
gm5020
OSC or
Micro-
XTAL
controller
SOP TP QUAD 2-INPUT
D0a
D0b
Q0
D1a
D1b
Q1
GND
PIN CONFIGURATION
- 34 -
OSD
Output
Data
Gamma
Path/
Control
Timing
Control
Output to
LCD
1
14
V
cc
13
2
D3b
3
12
D3a
4
11
Q3
5
10
D2b
6
9
D2a
7
8
Q2
Panel I/F
[48-bits]
Output
Control
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