Sanyo MCD-Z8F (AU) Service Manual page 14

Cd radio cassette recorder sanyo mcd-z8f (au)
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lC BLOCK DIAGRAM
& DESCRIPTION
IC101 LA9220MS
(Servo
Signal
Processor)
A
No. PIN NAME
1/0
FUNCTION
..
No. PIN NAME
1/0
FUNCTION
1
FIN2
I
Connection
Pin for Photo Diode of Pickup.
35
TOFF
I
Input Pin for Tracking Off Control Signal from
2
FIN1
I
FlFd2 +FIN1 =RF, FIN2-FIN1 = FE
Digital Signal Processor. TOFF = H: Off
3
E
I
Ccmnection
Pin for Photo Diode of Pickup.
36
TES
o
Output
Pin for Track
Error Sense
Signal
to
4
F
I
E-F = TE
Digital Signal Processor.
5
TB
I
Input Pin for DC ingredient of TE Signal.
37
HFL
1
High
Frequency
Level
Signal
use Detection
6
TE-
1
Connection
Pin for Gain Setbng Resistor of TE
Main-Beam
Position is on the pit or mirror.
Signal to TE Signal pin.
38
SLOF
I
Input Pin for Sled Servo Off Control.
7
TE
o
Clutput Pin for Tracking
Error Signal .
39
cv-
1
Input
Pin for Constant
Linear
Velocity
Error
8
TESI
I
Input Pin for Track Error Sense Comparator.
TE
40
Cv +
I
Signal from Digital Signal Processor.
Signal through Band pass, and Inputted.
41
RFSM
o
Output Pin for RF Signal.
9
Scl
I
in~ut Pin for Shock Detection.
42
RFS-
1
Connection
Pin for Gain Setting of RF
and
10
TH
I
Connection
Pin for Time
Constant
Setting
of
Constant
Setting
of 3T Compensation
of the
Tracking
Gain.
EFM Signal with RFSM Pin.
11
TA
o
Output Pin for TA Amplifier.
43
SLC
o
Slice Level Control Signal is Output Pin, It
12
TD-
1
Connection
Pin for Constant of Tracking
Phase
Control
Level of Data-Slice
by Digital Signal
Compensation,
Consist of between TD and VR.
Processor of the RF Waveform.
13
TD
I
Connection
Pin for Constant of Tracking Phase
44
SLI
I
Input Pin for Level Control
of Data-Slice
by
Compensation.
Digital Signal Processor.
.14
JP
I
Connection
Pin for Amplitude
Setting of Track-
45
DGND
-
Ground for Digital Signal.
ing Jump (Kick Pulse) Signal.
46
vc-
1
Input
Pin For VCO Control Amplifier,
Consist
15
TO
o
Output Pin for Tracking Control Signal.
of PLL Loop Filter with VCOC
and PDO of
16
FD
o
Output
Pin for Focusing Control Signal.
Digital Signal Processor.
17
FD-
f
Connection
Pin for Constant of Focusing Phase
47
Vcoc
o
Output Pin for VCO Control Signal.
Compensation,
Consist of between FD and FA.
48
Vco
o
Output Pin for VCO Signal.
18
FA +
1
Connection
Pin for Constant of Focusing Phase
49
DEF
o
Output Pin for Defect Detection of Disc.
Compensation,
Consist
of between
FD-
and
50
CLK
I
Input
Pin for Reference
Clock
Pulse,
Input
FA-.
4.23 MHz of Digital Signal Processor.
19
FA-
1
Connection
Pin for Constant of Focusing Phase
51
CL
I
Input Pin of Clock
Pulse for Command
from
Compensation,
Consist of between FA and FE.
Micro Processor.
20
FE
o
Output Pin for Focusing Error Signal .
52
DAT
I
Input
Pin of Data for Command
from Micro
21
FE-
1
Connection
Pin for Gain Setting Resistor of FE
Processor.
Signal to FE Signal pin.
53
CE
I
Input Pin of Chip Enable for Command
from
22
AGND
-
Ground for Analog Signa!.
Micro Processor.
23
SP
o
Output Pin for Single End of Input Signal of the
54
DRF
o
Detect RF Signal
is Output Pin for RF Level
CV +,
CV- Pin.
Detection.
24
SPI
I
Input Pin for Spindle Amplifier.
55
LF
I
Connection
Pin for Adjusting of VCO Free-run.
25
SPG
f
Connection
Pin for Gain Sening Resistor, when
56
VCC2
-
VCC for Servo and Digital Root.
Spindle
12 cm Mode.
57
REFI
f
Bus
Control
Connection
Pin
for Reference
26
sP-
1
Connection
Pin for Constant
of Spindle
Phase
Voltage.
Compensation
with SPD Pin.
58
VR
o
Output Pin for Reference Voltage.
27
SPD
o
Output Pin for Spindle Control Signal.
59
LF2
I
Connection
Pin for Time Constant
Setting of
28
SLEQ
I
Connection
Pin for Constant
of Sled
Phase
Defect Detection of the Disc.
Compensation.
60
PH1
1
Capacitor
Connection
Pin for Peak-hold of RF
29
SLD
o
Output Pin for Sled Control Signal.
Signal.
30
SL-
1
Input Pin for Sled Signal from Micro Processor.
61
BH1
f
Capacitor
Connection
Pin for Bottom-hold
of
31
SL +
I
RF Signal.
32
JP-
1
Input Pin for Tracking Jump Signal from Digital
62
LDD
o
Output Pin of APC (Automatic
Power Control)
33
JP +
I
Signal Processor.
Circuit.
34
TGL
I
Input Pin for Tracking Gain Control Signal from
63
LDS
I
Input Pin of APC (Automatic
Power Control)
Circuit.
Digital Signal Processor. TGL = H: Gain Low
64
Vccl
f
VCC for RF Root
-15–

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