Sony HCD-L7HD Service Manual page 70

HCD-L7HD
Pin No. Pin Name
134 Vcc
135 AUDATA0
136 TRST
137 TMS
138 TDI
139 TCK
140-143 IRLS3-0
144 MD0
145 Vcc-PLL1
146 CAP1
147 Vss-PLL1
148 Vss-PLL2
149 CAP2
150 Vcc-PLL2
151 AUDCK
152,153 Vss
154 Vcc
155 XTAL
156 EXTAL
157,158 STATUS0,1
159 TCLK
160 IRQOUT
161 VssQ
162 CKIO
163 VccQ
164 TxD0
165 SCK0
166 TxD1 (MD CONT)
167 SCK1
168 TxD2
169 SCK2
170 RTS2
171 RxD0
172 RxD1 (MD CONT)
173 Vss
174 RxD2
175 Vcc
176 IRQ5
177 MCS7 (CS ADDA)
178-180 MCS6-4
181 VssQ
182 WAKEUP
183 VccQ
184 RESETOUT
185-188 MCS3-0
189,190 DRAK0,DRAK1
191,192 DREQ0,DREQ1
193 RESETP
194 CA
195 MD3
196 MD4
197 MD5
70
I/O
— Power supply terminal (1.8V)
I/O AUD data (not used)
I Reset signal input (for test)
I Mode switch input (for test)
I Data input (for test)
I Clock signal input (for test)
I External interrupt signal input
I Clock mode setup terminal
— Power supply terminal for PLL1 (1.8V)
— External capacity terminal for PLL1
— Ground terminal for PLL1
— Ground terminal for PLL2
— External capacity terminal for PLL2
— Power supply terminal for PLL2 (1.8V)
I AUD clock input
— Ground terminal
— Power supply terminal (1.8V)
O Clock crystal terminal
I Clock crystal terminal
O Processer status 0,1 (not used)
I/O Clock signal input/output (TMC or RTC) (not used)
O Interrupt request output (not used)
— Ground terminal
I/O System clock input/output
— Power supply terminal (3.3V)
O Serial data output (not used)
I/O Serial clock output (not used)
O Serial data output
I/O Serial clock output (not used)
O Serial data output (for debug)
I/O Serial clock output
I/O Transmission request output
I Serial data input
I Serial data input
— Ground terminal
I Serial data input (for debug)
— Power supply terminal (1.8V)
I Power down signal input
O Input/Output signal port C
I/O Input/Output signal port C (not used)
— Ground terminal
I/O Interrupt request acknowledge input during standby mode (not used)
— Power supply terminal (3.3V)
O Reset signal output
I/O Input/Output signal port C (not used)
O DMA request acceptance input (not used)
I DMA request input
I Power ON reset signal input
I Chip active input (not used)
I Bus width setup for area 0 (fixing L)
I Bus width setup for area 0 (fixing H)
I Endian setup
Description