Sanyo DC-007C Service Manual page 32

IC BLOCK DIAGRAM & DESCRIPTION
IC103 LA6541 (Pick-up Actuator&CD Mechanism Motor)
IC131,132 TA7291S (Bridge Driver)
I
'h
——M++T
Vcx Vrd VIN4 VG4 Vca V07 GND
W& V* vG3 VIN3 CD RES
F"YJ 11-
r-n I
Ill I t
1
t
I II
Level BTL
Bn
Level
Sill DtfveJ
Dtlver
sin
Re@alw
Ilkll
I
I
Vcc
Mute
VIN1 VGI
Voi V02
GND
VC3 V& VG2 VIM
Reg OUT Reg IN
IC190 M38504M6-203FP (Single Micro chip 8-bit)
% Name
Function
1 Vcc
Apply voltage of 2.{ - 5.5V to
Vcc, and OV to Vss.
I-feference voltage input pm for A-D
2 VREF
converter.
3 AVSS Connect Vss.
4 P44/lNT3/PwM
5 p43/[NT2 8-bit CMOS 1/0 port with the same
6 p42/lNTl
function as port PO.
7 P4111NT0 CMOS compatible input level.
8 P401CNTR1 CMOS 3-state output structure.
~ P27/CNTRO/
dlrectlon register allows each pm
SRDY
to
be individually programmed as
either input or output.
10 P26/SCLK 8-bit CMOS 1/0 port.
11 P2FJ/SCf-2~Xt) P20 , P21, p24 to P27 : CMOS 3-
12 P24/SDAZ/RXD state output structure.
13
p23/Scl-I
between CMOS compatible input
14 P221SDAI level or SMBUS input level in the
16 p21/)(CIN 12C-BUSinterface function.
17
p20/XOUT
structure in the 12C-BUSinterface
function.
P22, p23: N-channel opendrain
Th"
IS
pm controls the operation
15 CNVSS
mode of the chip.
Normally connected to VSS
18 RESET Reset input pin for active "L".
Input and output pms for the clock
generating circuit.
19 XIN When an external clock is used,
connect the clock source to the XIN
pin and
leave the XOUTpin open.
Connect a ceramic resonator or
20
XOUT
quartz-crystal oscillator between the
XIN and XOUTpins to set the
oscillation frequency.
21 Vss
Apply voltage of 2.7- 5.5V to
Vcc, and OV to Vss.
22 P1
23 PI;
24 P15 8-bit CMOS 1/0 port.
25 P14 CMOS 3-state output structure.
26 P13 1/0 direction resister allows each pin
27 P12 to be individually programmed as
28 Pll either input or output.
29 Plo CMOS compatible.
P13 to P17 (5 bits) are enabled to
output large current for LED drive
32 P05
(M38513E41M4).
33 P04 P1o to P17 (8-bits) are enabled to
34 P03 output Iar e current for LED drive
35 P02
i (M38514 61M6)
36 Pol
37 Poo
3 8 P34/AN4
39 P33/AN3
8-bit CMOS l/O ort with the same
40
pz2/AN2
8
function as port O.
41
p31/ANl
CMOS compatible input level.
42 p30/ANo
CMOS 3-state output structure.
Vcc Wef
INI IN2
GND
]
Vs
) OUTI
) 0UT2
&k
v. v=
mm
ON.
T *
sub
'r
CMl
m
;! w+
.. ,, ,,,,,, ............ ,,, , ,, ,,, ......
,,,,,,,, . .... ,,
1 i t
II
4
cmcw~"ratino
I
RAM RON
II
la
S*
0
SANYO Technosound Co., Ltd.
_.
Osaka, Japan
Aug. / '99/ 450 NS Printed in Japan