Motorola T200 Service Manual page 58

Topaz T2688/T200, T2988/T205 L3 Circuit Description
23. The processed digital audio is received from the
is interpolated within a speech-digital infinite duration impulse response filter (IIR)
(i.e. that is, for the data coming in, the adjacent bits of the data being looked at are all
synchronised and an average taken. From this a prediction of events can be
calculated) also the sampling rate is increased to 1Mhz and the speech bandwidth is
limited by high and Low pass responses.
24. The signal is then fed into a Sigma-Delta Modulator for D/A conversion this will
then give a 1 bit over-sampled signal
25. This over-sampled signal (we over-sample to allow much cheaper and easier
reconstruction of the received signal) is now D/A'd and a high frequency noise tone is
injected into the signal. This noise will be used for programming the PGA. There are
7 programmable gains and 1 mute function.
26. The noise is then removed in a smoothing filter and the appropriate gains or
attenuations made.
27. The converted speech can then take 1 of 2 paths.
28. Path 1 to the Internal speaker
33, and fed directly to the speaker, voltage suppressers
ESD protection. The speaker is situated in the front housing of the unit and is
connected to the main PCB through 2 contact springs.
29. Path 2 to an External Speaker, the audio is fed out from the
AUXO, it passes through
purposes. From here it is fed to Pin 4 of the
From Serial IIR
Filter
Interface
7
LS1, the audio is fed out of the
Connector 3, J10
Interpolation
filter
Auxiliary
AUX0
Amp
Ear-piece
EARP
Amp
EARN
Motorola Proprietary Information
Gemini at 8Khz, from here the signal
VEGA
U4 and
VEGA IC
which is a jumper connector for JTAG
External Connector
Sigma – Delta
Modulator
DAC
Smoothing
Filter & PGA
on Pins 32 &
U5 are responsible for
on Pin 34
J40.
1 Bit
Side-tone