Sony DCR-DVD92 Service Manual page 12

For Schematic Diagram
• Refer to page 4-79 for printed wiring board of MD-114.
• Refer to page 4-83 for printed wiring board of MD-120.
2 3
1
MD-114/MD-120 BOARD(4/8)
REC/PB RF AMP
A
XX MARK:NO MOUNT
CN4101 51P
FPDIC_VCC 1
FPDIC_OUT 2
FPDIC_VC 3
FPDIC_GND 4
FPDIC_GND 5
B
FPDIC_GND 6
TLT+ 7
TLT+ 8
TLT- 9
TLT- 10
TRK+ 11
TRK+ 12
TRK- 13
C
TRK- 14
FCS+ 15
FCS+ 16
FCS- 17
FCS- 18
PDIC_GND 19
PDIC_GND 20
SLEEP_SW 21
D
PDIC_GAIN 22
MECHANISM
DECH PDIC_VCC 23
(DDX-C1000)
PDIC_VC 24
JL4114
RF+ 25
JL4115
RF- 26
JL4116
A 27
JL4117
B 28
JL4118
C 29
E
JL4119
D 30
JL4120
E 31
JL4121
F 32
JL4122
G 33
JL4123
H 34
LDD_RSET 35
LDD-W2SET 36
LDD-W1SET 37
F
LDD-W3SET 38
LDD_AVSS 39
ENBL 40
TEMP 41
LDD_AVDD 42
LDD_HVDD 43
LDD_LVDD 44
LDD_LVDD 45
G JL4124
LDD_OSCMOD 46
JL4125
LDD-OSCEN 47
DVSS 48
LDD_W1DIS 49
LDD_W2DIS 50
LDD_W3DIS 51
MECHANISM DECK is replaced as a block.
H
So that there PRINTED WIRING BOARD and
SCHEMATIC DIAGRAM are omitted.
16
DCR-DVD92/DVD92E/DVD103/DVD602/DVD602E/DVD653/DVD653E
4 5 6
NO MARK:REC/PB MODE
:Voltage measurement of the CSP IC
R :REC MODE
and the Transistors with mark,is
P :PB MODE
not possible.
FB4101
0uH
C4143
C4104 C4102 C4101 C4103
0.001u
10u
1u 10u
1u B
TLT+
TLT-
TRK+
TRK-
FCS+ G
P1HI
H
P1GI
F
FCS-
P1FI
E
P1EI
C
P1DI
D
P1CI
SLEEP_SW
A
P1BI
B
P1AI
R4104
C4106
10k PUVR
0.01u
P1RFN
P1RFP
C4107
P2RF
0.01u
A
P2AI
B
P2BI
C
P2CI
D
P2DI
C4105
E
0.1u
P2EI
B
F
P2FI
G C4140
APCWF
0.022u
H B
APCRF
LDOR C4141
0.033u
LDOPK B
LDOW
R4113 R4114
1k LDOEX
47k
LDON
BATT_IN
TEMP
Q4102
1
DTC144EMT2L
2.3
SWITCH
R4101
R2.9
2
10k
P0
C4108
3
4700p
XMOD_RW
HFQON
EFMWP
EFMPK
EFMOFP JL4126
1
0
2.9 PDHG
2
3 Q4101
DTC144EMT2L
SWITCH
REG_GND
4-27
7 8 9
C4142
XX
JL4103
B12 B11 C11 C12 D12 D11 E12 E11 F11 F12 G12 G11 J11 H11 H12 J12 K12 K11 L12 M12
RESET
TEST3
TEST2
IC4101
VCCR
VCC2
REC/PB RF AMP
RFOP
RFON
IC4101 GND2
TB1299XBG
CSP(CHIP SIZE PACKAGE)IC
ROPC
WBO
A1 B1 C2 C1 D2 D1 E1 E2 F1 F2 G2 G1 H2 J2 H1 J1 K1 K2 L2 L1
C4122
0.01u
B
C4116
10u C4124
B 0.1u
B
B
C4121
R4123 C4112
R4145
10u
12k 0.1u
6800
± 0.5%
C4120
L4101
10u
R4124 4.7uH
B
2.5V
2200
± 0.5%
10 11 12
LVL
CEO
ROPC
L4102
4.7uH
VRCK
SCD
4.3V
C4133
WRTON
10u
FLGA
WBAL_ADJ
SCB
R4139 R4144
HFQON
47k 0
RF_RST_X
EFMWP
EFMPK
D4102
C4139
XX
JL4106 XX
C4131 EFMOFP
6800p
ANMON
RPP
ROPCS
RPB
JL4107
APCWSP
C4132
6800p
JL4129
RFS APCRSP
RFS
C4137 0.1u B
TEST_RFOP READSP
RFS
C4126 TEST_RFON
0.1u
C4136 0.1u B RFOP RFOP
B
RFON RFON
JL4128
RFRP
RFRP
RFZI
RFZI
RPO
C4127
R4135
10k
33p TEO TEO
RPZ
C4125 0.22u
TEZI
TEZI
TEO
R4136 10k R4142 XX
FEO
FEO
FEO
R4137 10k C4128 33p
LVL
LVL
VRD
C4129 33p
R4143 10k
CEO
TEP
C4134 33p
SLEEP_SW
ROPC
C4130 XX
HDO TEMP
HDO
WBO XMOD_RW
PDHG
C4135
RF_RST_X
XX
TEST_FE0
LDON
TEST_TE0
TLT+
TLT-
TRK+
TRK-
FCS+
FCS-
FSAC
TEST_RFON
TEST_RFOP
TEST_FE0
TEST_TE0
HDO
WBO
BATT_IN
4-28
Ver 1.1 2005. 05
13 14
DRV_A_4.3V
@M12
(2/8)
WG_A_2.5V
LVL
CEO
ROPC
VRCK
SCD
WRTON
FLGA
WBAL_ADJ
SCB
HFQON
EFMWP
@M24
EFMPK (5/8)
EFMOFP
ANMON
ROPCS
APCWSP
APCRSP
READSP
RFS
RFOP
RFON
RFRP
RFZI
TEO
TEZI
FEO
VRD @M25
(5/8,7/8)
SLEEP_SW
TEMP
XMOD_RW
@M23
(6/8)
PDHG
RF_RST_X
LDON
TLT+
TLT-
TRK+
@M19
(7/8)
TRK-
FCS+
FCS-
@M20
(5/8,6/8)
FSAC
REG_GND
TEST_RFON
TEST_RFOP
@M21
(8/8)
TEST_FE0
TEST_TE0
HDO
@M22
(5/8,8/8)
WBO
@M09
BATT_IN (2/8,3/8)
MD-114 (4/8)/MD-120 (4/8)