Hardware Block Diagram - FFV Q HD DVR Hardware Technical Reference Manual

S P E C I F I C A T I O N S
Q HD DVR
CIRCUIT BOARD
HD-SDI
Video /
Embedded
Audio In
AES Audio
In
LTC In / Out
Local
Bus
Real
Time
Clock
232
Port
Q HD DVR Hardware Technical Reference - Rev. 1.1

HARDWARE BLOCK DIAGRAM

Video
Equalizer /
De-Serializer
Digital
Video
Bus
JP2K
Compression
Encoder/Decoder
LTC
Codec
Micro-
RS
processor
RS232
Port
Video Serializer
/ Driver
32 MB
DRAM, DMA
Subsystem,
and AES
Encoder/
Decoder
IDE Hard
Disk
Controller
32 MB
Private
SDRAM
16 MB Flash
Embedded
PATA –
SATA
Bridge
EPROM
HD-SDI
Video /
Audio Out
AES Audio
Out
SATA
In / Out
3