Imperx IPX CAMERA SERIES User Manual page 8

High-resolution, programmable 8/10/12 bit, camera link digital cameras
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IPX Manual RB01
List of Tables
Table 1.0 - Pixel structure for different IPX cameras. ............................................................... 17
Table 1.1 - Camera Specifications............................................................................................... 19
Table 1.2 - Camera Output Connector - Signal Mapping ......................................................... 24
Table 1.3 - Base Camera Link bit assignment ............................................................................ 25
Table 1.4 - Camera Power Connector Pin Mapping .................................................................. 26
Table 1.5a - BNC Connectors Pin Mapping ............................................................................... 26
Table 1.5b - I/O Interface Connector - Pin Mapping ................................................................ 27
Table 2.1 - Pixel Structure and Frame Rates ............................................................................. 41
Table 2.2 - Allowable Horizontal and Window Sizes.................................................................. 56
Table 3.1. IPX-1M48 Camera work-space address map ............................................................ 81
Table 3.3. IPX-VGA Boot Control Register. ............................................................................... 85
Table 3.4. IPX-VGA Camera Control 1 Register........................................................................ 85
Table 3.5. IPX-VGA Camera Control 2 Register........................................................................ 85
Table 3.6. IPX-VGA External Trigger Duration Register. ........................................................ 86
Table 3.7. IPX-VGA Vertical Window Top Lines Register. ....................................................... 86
Table 3.8. IPX-VGA Vertical Window Bottom Lines Register................................................... 86
Table 3.9. IPX-VGA Shutter Time Select Register. .................................................................... 86
Table 3.10a. IPX-VGA Long Integration Time Low Register.................................................... 87
Table 3.11. IPX-VGA Strobe Position Select Low Register. ...................................................... 87
Table 3.12. IPX-VGA Horizontal Window Size Left Register.................................................... 87
Table 3.13. IPX-VGA Horizontal Window Size Right Register. ................................................ 88
Table 3.14a. IPX-VGA AFE Operation Low Register................................................................ 88
Table 3.14b. IPX-VGA AFE Operation High Register. ............................................................. 88
Table 3.15a. IPX-VGA AFE Control Low Register.................................................................... 88
Table 3.15b. IPX-VGA AFE Control High Register. ................................................................. 88
Table 3.16a. IPX-VGA AFE Clamp Low Register. .................................................................... 89
Table 3.16b. IPX-VGA AFE Clamp High Register. ................................................................... 89
Table 3.17a. IPX-VGA AFE Gain Low Register. ....................................................................... 89
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5/6/2005
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