Table of Contents
Advertisement
8.
Circuit
3V3_MUX
R4
R2
R3
10K
10K
10K
TCK
TMS
TDI
/TRST
1394CON[0..2]
R17
1394CON1
10k
1394CON2
1394CON0
TSI_BYTECLKVALID
TSI_BYTECLK
3V3_MUX
TSI_PACKETCLK
TSI_ERROR
TSI_DATA[0..7]
R20
10K
ERROROUT
R260 0
1394DATA0
CPUANAL
R261 0
1394DATA1
CPURESET
R262 0
1394DATA2
1394DATA3
R263 0
R22
R264 0
1394DATA4
R21
10K
R265 0
1394DATA5
10K
R266 0
1394DATA6
R267 0
1394DATA7
1394CON[0..2]
J1
1
R23
2
56
L_OUT
3
L_IN
4
5
R24
H5
10K
1394DATA[0..7]
3V3_MUX
R29
R30
10K
10K
for TP2
SPEEDSELECT1
SPEEDSELECT0
R32
NC
for TP3
3V3_MUX
R34
10K
J2
1
1
BOOTSOURCE0
2
BOOTSOURCE1
2
H2
R36
10K
SC1_RST
SC1_RXD
SC1_TXD
J3
5VD
1
2
3
4
5
W5
MONDEX CON
BD1
J7
5VD
BC3560
1
SCL
2
SDA
3
4
/MOD_IR_DATA
5
/MCU_RESET
6
MOD_SDA
7
FMCU_INT
8
MOD_SCL
9
9V_ON/OFF
10
W10
3V3_MUX
C16
C17
C18
C19
C20
C21
C22
C23
C24
C15
+
100U
104
104
104
104
104
104
104
104
104
S-00-005(96.03.27)
SERVICE MANUAL
3V3
3V3_MUX
R57
0
TP4 TP5
TP6
TP7
3V3_MUX
R275 0
R276 0
R277 0
R19
U1
10k
78
LBYTECLK
79
LBYTECLKVALID
80
LPACKETCLK
81
LERROR
69
TSI_DATA0
LDATA0
70
TSI_DATA1
LDATA1
71
TSI_DATA2
LDATA2
72
TSI_DATA3
LDATA3
73
TSI_DATA0
TSI_DATA4
LDATA4
74
TSI_DATA1
TSI_DATA5
LDATA5
75
TSI_DATA2
TSI_DATA6
LDATA6
TSI_DATA3
TSI_DATA7
76
LDATA7
TSI_DATA4
TSI_DATA5
83
TSI_DATA6
TP12
1284/SELECTIN
84
TSI_DATA7
TP13
1284/INIT
85
TP15
1284/FAULT
86
TP16
1284/AUTOFD
88
TP17
1284SELECT
R270 NC
89
1394CON0
1284PERROR
R271 NC
90
1394CON1
1284BUSY
R272 NC
91
1394CON2
1284/ACK
103
TP18
1284/STROBE
R250 NC
101
1394DATA0
1284DATA0
1394DATA1
R251 NC
100
1284DATA1
R252 NC
99
1394DATA2
1284DATA2
1394DATA3
R253 NC
98
1284DATA3
R254 NC
96
1394DATA4
1284DATA4
1394DATA5
R255 NC
95
1284DATA5
R256 NC
94
1394DATA6
1284DATA6
1394DATA7
R257 NC
93
1284DATA7
121
TDI
TDI
122
TMS
TMS
123
TCK
TCK
124
/TRST
/TRST
125
TP27
TDO
3V3_MUX
R31
TP30
170
/WDRESET
116
/RST
/RST
10K
TP33
126
L_IN
LINKIN
127
L_OUT
LINKOUT
117
CPUANAL
CPUANALYSE
119
CPURESET
CPURESET
120
ERROROUT
ERROROUT
129
SC0_AUX_I_01
P00(SC1DATAOUT)
130
SC0_I_O
P01(SC1DATAIN)
131
SC0_AUX_I_02
P02(SC1EXTCLK)
132
SC0_CLK
P03(SC1CLK)
133
SC0_RST
P04(SC1RST)
134
SC0_CMDVCC
P05(SC1CMDVCC)
135
IRQUARTCA
P06(SC1CMDVPP)
136
SC0_DETECT
P07(SC1DETECT)
138
P10(SCC0MTSR)
139
SDA
P11(SCC0MRST)
140
SCL
P12(SCC0CLK)
141
PWMOUT0
P13(PWMOUT0)
142
VOL_CONT
P14(PWMOUT1)
143
RS_TXD
P15(ASC1TXD)
145
RS_RXD
P16(ASC1RXD)
146
G729_INT
PIO17
147
SHORT
P20(SC0DATAOUT)
148
CH_SYNC
P21(SC0DATAIN)
149
/CD2
P22(SC0EXTCLK)
150
G729_SW
P23(SC0CLK)
151
BEEP_SW
P24(SC0RST)
153
P25(SC0CMDVCC)
154
LCD
P26(SC0CMDVPP)
155
HINT
P27(SC0DETECT)
156
P30(SCC1MTSR)
157
QPSK_SDA
P31(SCC1MRST)
158
QPSK_SCL
P32(SCC1CLK)
159
FLIP_CON
P33(CAPTUREIN0)
160
PPD
P34(CAPTUREIN1)
162
MODULE_USES_I2C
P35(CAPTURECLK0
163
RS_DTR
P36(CAPUTRECLK1
164
RS_RTS
P37(1284OUT)
165
SC1_TXD
P40(ASC3TXD)
166
SC1_RXD
P41(ASC3RXD)
167
/BSKYB_INT
P42(TTEXTCLOCK)
168
FMCU_INT
P43(1284PLH)
169
IRQEMMECM
P44(1284HLH)
172
TP56
P45(INTERRUPT3)
173
P46(INTERRUPT4)
TP57
182
BOOTSOURCE0
BOOTSOURCE0
183
BOOTSOURCE1
BOOTSOURCE1
111
SPEEDSELECT0
SPEEDSELECT0
112
SPEEDSELECT1
SPEEDSELECT1
ST20TP2
C25
C26
C27
C28
C29
C30
C31
C32
104
104
104
104
104
104
104
104
REV.1
3V3_MUX
5VD
R5
R6
R7
R8
R9
C45
104
0
0
NC
NC
NC
for TP3
for TP2
A[2..23]
1
A2
MEMADD2
2
A3
MEMADD3
4
A4
MEMADD4
5
A5
MEMADD5
6
A6
MEMADD6
7
A7
MEMADD7
9
A8
MEMADD8
10
A9
MEMADD9
11
A10
MEMADD10
12
A11
MEMADD11
14
A12
MEMADD12
15
A13
MEMADD13
16
A14
MEMADD14
17
A15
MEMADD15
19
A16
MEMADD16
20
A17
MEMADD17
21
A18
MEMADD18
22
A19
MEMADD19
24
A20
MEMADD20
25
A21
MEMADD21
26
A22
MEMADD22
27
A23
MEMADD23
D[0..31]
29
D0
MEMDATA0
30
D1
MEMDATA1
31
D2
MEMDATA2
32
D3
MEMDATA3
34
D4
MEMDATA4
35
D5
MEMDATA5
36
D6
MEMDATA6
37
D7
MEMDATA7
39
D8
MEMDATA8
40
D9
MEMDATA9
41
D10
MEMDATA10
42
D11
MEMDATA11
44
D12
MEMDATA12
45
D13
MEMDATA13
46
D14
MEMDATA14
47
D15
MEMDATA15
49
D16
MEMDATA16
50
D17
MEMDATA17
51
D18
MEMDATA18
52
D19
MEMDATA19
54
D20
MEMDATA20
55
D21
MEMDATA21
56
D22
MEMDATA22
57
D23
MEMDATA23
59
D24
MEMDATA24
60
D25
MEMDATA25
61
D26
MEMDATA26
62
D27
MEMDATA27
64
D28
MEMDATA28
65
D29
MEMDATA29
66
D30
MEMDATA30
67
D31
MEMDATA31
192
/MEMBE0
/MEMBE0
193
TP34 TP35 TP36 TP37
/MEMBE1
/MEMBE1
194
/MEMBE2
/MEMBE2
195
/MEMBE3
/MEMBE3
197
MEMR/W
199
/MEMCSROM
200
/MEMRAS0
202
/MEMRAS1
/MEMRAS1
198
/MEMRAS2
/MEMRAS2
203
/MEMRAS3
TP42
204
/MEMCAS0
205
/MEMCAS1
/MEMCAS1
207
/MEMCAS2
/MEMCAS2
208
/MEMCAS3
R37
/MEMCAS3
R38
10K
10K
177
MEMREQ
178
MEMGRANT
179
/MEMRD
/MEMRD
TP46
TP48
181
TP47 TP49
CPU_Wait
MEMWAIT
185
PROCCLOCKOUT
PrcoClk
187
/CS0
188
/CS1
189
/CDSTRB0
190
/CDSTRB1
174
/CDREQ0
175
/CDREQ1
104
INTERRUPT0
105
INTERRUPT1
TP55
R39
106
TTXTEVEN/ODD
107
TTXTREQ
TTXTREQUEST
108
100
TTXTDATA
TTXTDATA
R40
110
27MHz
CLOCKIN
56
R41NC
113
LPCLOCKOSC
114
X2
LPCLOCKIN
NC
32.768KHz
C12
C13
NC
NC
10P
22P
PAGE REV.
Document No
Date of Origin
Date of REV
3V3
R58
0
R1
C1
56
104
U2
R10
1
14
X1
56
I1
VCC
2
13
27MHz
O1
I6
3
12
I2
O6
R11
4
11
PIXCLK
O2
I5
56
5
10
R14
TP1
I3
O5
6
9
56
TP3
O3
I4
TP2
7
8
TP8
27MHz
GND
O4
74VHC04
TP9
U3
DS1233
/RST
5VD
RST
S1
TSW
C6
102
RESET
U5
74F138
FLIP_CON
1
15
TP19
A21
A
Y0
2
14
TP20
A22
B
Y1
3
13
A23
C
Y2
TP21
5VD
12
TP23
Y3
16
11
TP25
VCC
Y4
6
10
TP28
G1
Y5
4
9
/MEMCSROM
G2A
Y6
5
7
G2B
Y7
C8
104
5VD
A21
A22
A23
/MEMRAS2
R33
C9
0
for TP2
104
MEMR/W
R35
NC
for TP3
D[0..31]
RAMR/W
D0
/MEMCSROM
D1
D2
/MEMRAS0
D3
D4
D5
D6
D7
/MEMCAS0
/LATCH0_CS
D[0..31]
TP52
TP50
D0
TP51
TP53
D1
D2
D3
D4
/CS0
D5
/CS1
D6
/CDSTRB0
D7
/CDSTRB1
/CDREQ0
/CDREQ1
/LATCH1_CS
/INTERRUPT0
/INTERRUPT1
TEVEN/ODD
D[0..31]
D0
D1
D2
D3
D4
D5
D6
D7
/LATCH2_CS
0
PAGE
51-L-DSR004
98-10-21
3V3
R59
NC
C2
150ohm
R12
R13
R15
PWMOUT0
82P
100K
68K
2.2M
C4
C3
R16
100K
33P
22N
R18
1K
VD1
VD2
1SV215
1SV215
5VD
C5
104
TP14
TP10
TP11
U4
74HC04
1
14
I1
VCC
2
13
O1
I6
G729_SW
3
12
I2
O6
4
11
BEEP_SW
O2
I5
5
10
5VD
I3
O5
6
9
O3
I4
7
8
GND
O4
R42
R43
10K
10K
G729_ON
BEEP_ON
3V3
3V3
/FLB1_CS
/FLB0_CS
R28
U6
10K
C7
74LCX257
1
16
104
SEL
VCC
2
15
1A
G
3
14
1B
4A
TP22
4
13
TP24
1Y
4B
5
12
TP26
2A
4Y
6
11
TP29
2B
3A
7
10
TP31
2Y
3B
8
9
TP32
GND
3Y
U7
74F138
1
15
A
Y0
TP60
2
14
/MODEM_CS
B
Y1
3
13
C
Y2
/G729_CS
12
/LATCH0_CS
Y3
16
11
VCC
Y4
/LATCH1_CS
6
10
/LATCH2_CS
G1
Y5
4
9
G2A
Y6
TP61
5
7
/BSKYB_CS
G2B
Y7
R63
100
U8
74AC377SCX
A_MUTE
3
2
TP63
D1
Q1
4
5
TP38
D2
Q2
RGBCONTA
7
6
TP39
D3
Q3
RGBCONTB
8
9
TP40
BSKY_OUT
D4
Q4
13
12
D5
Q5
POLARITY
14
15
22K_ON/OFF
D6
Q6
17
16
D7
Q7
LNB_OFF
18
19
D8
Q8
SC1_RST
20
VCC
5VD
11
CLK
1
C10
G
104
U9
74AC377SCX
3
2
RS_DCD
D1
Q1
4
5
RS_DSR
D2
Q2
7
6
RS_CTS
D3
Q3
8
9
RS_RI
D4
Q4
13
12
CH_CTRL
D5
Q5
14
15
D6
Q6
CH_RST
17
16
/BSKYB_RST
D7
Q7
18
19
BSKYB_NOTLINK
D8
Q8
20
VCC
5VD
11
CLK
1
C11
G
104
U10
74AC377SCX
3
2
D1
Q1
RF_CTRL
4
5
/RESET_IC
D2
Q2
7
6
D3
Q3
/MCU_RESET
8
9
/EPLD_RESET
D4
Q4
13
12
SPARE
D5
Q5
14
15
CVBSCONTA
D6
Q6
17
16
CVBSCONTB
D7
Q7
18
19
BEEP
D8
Q8
20
VCC
5VD
11
CLK
1
C14
G
104
SAMSUNG ELECTRO-MECHANICS CO., LTD.
Title
ST-TP2 MAIN
Size Document Number
Rev
Custom
SEMCO-BSKYB
Date:
Sheet
1
16
of
Friday, October 16, 1998
79/102
4.8
Advertisement
Table of Contents
