5-2-4. MTK6226 BASE BAND CHIP
Details the block diagram of MT6226. Based on a dual-processor architecture, MT6226 integrates
both an
ARM7EJ-S core and a digital signal processor core. ARM7EJ-S is the main processor that is
responsible for running
high-level GSM/GPRS protocol software as well as multi-media applications. The digital
signal processor handles the low-level MODEM as well as advanced audio functions.
Except for some mixed-signal circuitries, the other building blocks in MT6226 are
connected to either the microcontroller or the digital signal processor.
Specifically, MT6226 consists of the following subsystems:
Microcontroller Unit (MCU) Subsystem - includes an ARM7EJ-S RISC processor and its
1.
accompanying memory management and interrupt handling logics.
Digital Signal Processor (DSP) Subsystem - includes a DSP and its accompanying memory,
2.
memory controller, and interrupt controller.
MCU/DSP Interface - where the MCU and the DSP exchange hardware and software
3.
information.
Microcontroller Peripherals - includes all user interface modules and RF control interface
4.
modules.
Microcontroller Coprocessors - runs computing-intensive processes in place of Microcontroller.
5.
DSP Peripherals - hardware accelerators for GSM/GPRS channel codec.
6.
Multi-media Subsystem - integrates several advanced accelerators to support multi-media
7.
applications.
Voice Front End - the data path for converting analog speech from and to digital speech.
8.
Audio Front End - the data path for converting stereo audio from stereo audio source
9.
Baseband Front End - the data path for converting digital signal from and to analog signal of
10.
RF modules.
Timing Generator - generates the control signals related to the TDMA frame timing.
11.
Power, Reset and Clock subsystem - manages the power, reset, and clock distribution
12.
inside MT6226. Details of the individual subsystems and blocks are described in
following Chapters.
KP220 SERVICE MANUAL V1.2