JVC KS-FX200 Service Manual page 19

QQ
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3.Block diagram
XIN
XOUT
FMIN
AMIN
SNS
VDD
VSS
V-DET
HCTR
LCTR
HOLD
TEST1
TEST2
PA0
PA1
PA2
TE
L 13942296513
PA3
PB0
PB1
PB2
BP3
PC0
PC1
PC2
PC3
PD0
PD1
PD2
PD3
PE0
SCK2/PE1
PO2/PE2
SI2/PE3
PF0
SCK1/PF1
SO1/PF2
SI1/PF3
www
PF0
SCK1/PF1
.
SO1/PF2
SI1/PF3
http://www.xiaoyu163.com
DIVIDER REFERENCE DIVIDER
1/16, 1/17
PROGRAMMABLE DIVIDER
1/114, 1/124
LATCH
SNSFF
1/2
UNIVERSAL
COUNTER
(20bits)
RAM
512 4bits
BUS
DRIV.
LATCH
BUS
DRIV.
ROM
12K 16bits
LATCH
BUS
DRIV.
ADDRESS DECODER
LATCH
BUS
DRIV.
PROGRAM COUNTER
LATCH
BUS
STACK
DRIV.
LATCH
BUS
DRIV.
SIO
x ao u163
y
LATCH
i
BUS
DRIV.
http://www.xiaoyu163.com
2 9
8
SELECTOR
ADDRESS
DECODER
Q Q
3 6 7 1 3 1 5
BUS
DRIVER
INSTRU-
CTION
DECODER
JUDGE
ALU
ADC
co
.
9 4 2 8
LC72362N-9920
PHASE
DETECTOR
UNLOCK SUB
F/F C.P.
PHASE
DETECTOR
LATCH
LATCH
BUS
DRIV.
LATCH
BUS
DRIV.
LATCH
BUS
DRIV.
0 5 8 2 9 9 4 2 8
MPX
BEEP
LATCH
BUS
DRIV.
LATCH
BUS
DRIV.
LATCH
BUS
DRIV.
INTERRUPT
LATCH
BUS
DRIV.
BUS
DRIV.
MPX
m
BUS
DRIV.
KS-FX200
9 9
E01
E02
SUBPD
EO3
PQ0
PP3
PP2
PP1
PP0
PO3
PO2
PO1
PO0
PN3
PN2
PN1
9 9
PN0/BEEP
PM3
PM2
PM1
PM0
PL3
PL2
PL1
PL0
PK3
PK2
PK1/INT1
PK0/INT0
PJ3
PJ2
PJ1
PJ0
PI1/ADI5
PI0/ADI4
PH3/ADI3
PH2/ADI2
PH1/ADI1
PH0/ADI0
1-19