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JVC KS-FX200 Service Manual page 18

Cassette receiver
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KS-FX200
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3 7 63 1515 0
LC72362N-9920 (IC701) : System control
1. Pin layout
80
1
to
24
25
2. Pin function
Pin No.
Symbol
1
XIN
TEST2
2
3
PG3/SI0
4
PG2/SO0
5
PG1/SCK0
6
PG0
7
PF3/SI1
8
PF2/SO1
9
PF1/SCK1
10
PF0
11
PE3/SI2
12
PE2/SO2
13
PE1/SCK2
14
PE0
15~18
PD3~PD0
TE
L 13942296513
19~22
PC3~PC0
23~26
PB3~PB0
27~30
PA3~PA0
31
V DD
32
PQ0
33~36
PP3~PP0
37~40
PO3~PO0
41~43
PN3~PN1
44
PN0/BEEP
45~48
PM3~PM0
49~52
PL3~PL0
53,54
PK3, PK2
55,56
PK1/INT1, PK0/INT0
57~60
PJ3/DAC3~PJ0/DAC0
61,62
PI1/ADI5, PI0/ADI4
63~66
PH3/ADI3~PH0/ADI0
67
HOLD
68
SNS
69
LCTR
HCTR
70
EO3
71
SUBPD
72
www
73
V DD
AMIN
74
75
FMIN
V SS
76
77,78
EO2,EO1
79
TEST1
80
XOUT
1-18
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to
65
64
to
41
to
40
I/O
I
4.5MHz crystal oscillator connections
LSI test pin.
I/O
General-purpose input/output and serial input/output shared ports.
Output only port.
O
Key source signal output only ports.
O
Key return signal input only port, of which threshold voltage is designed to be
I
low.
Power supply connections.
O
General-purpose input/output port.
O
O
Output only port.
O
General-purpose output port/BEEP tone shared output pins.
I/O
General-purpose input/output ports.
I/O
General-purpose input-output/external interrupt shared port.
O
General-purpose output port/DAC shared output pins.
I
General-purpose output port/ADC shared input pins.
I
PLL control, CLOCK STOP mode control pin.
I
Voltage sense/general-purpose input pin shared port.
Universal counter (frequency, cycle measurement)/general-purpose input
I
shared input port.
Universal counter/general-purpose input shared input port.
I
O
2nd PLL charge pump output pin.
Sub-charge pump output pin.
O
Power supply connections.
O
AM VCO (local oscillator) input pin.
I
x
ao
y
FM VCO (local oscillator) input pin.
I
O
Power supply connections.
.
i
Main charge pump output pins.
O
LSI test pin.
O
4.5MHz crystal oscillator connections
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8
Function
Q Q
3
6 7
1 3
u163
.
2 9
9 4
2 8
1 5
0 5
8
2 9
9 4
m
co
9 9
2 8
9 9

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