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• Pin function
QQ
PIN No.
SYMBOL
3 7 63 1515 0
1
TEST0
2
HSO
3
UHSO
4
EMPH
5
LRCK
6
VSS
7
BCK
8
AOUT
9
DOUT
10
MBOV
11
IPF
12
SBOK
13
CLCK
14
VDD
15
VSS
16
DATA
TE
L 13942296513
17
SFSY
18
SBSY
19
SPCK
20
SPDA
21
COFS
22
MONIT
23
VDD
24
TESIO0
25
P2VREF
26
HSSW
27
ZDET
28
PDO
29
TMAXS
30
TMAX
www
.
31
LPFN
32
LPFO
33
PVREF
http://www.xiaoyu163.com
I/O
FUNCTIONAL DESCRIPTION
I
Test mode terminal.Normally, Keep at open.
0
Playback speed mode flag output terminal.
0
Subcode Q data emphasis flag output terminal.Emphasis ON at "H" level and
0
OFF at "L" level.The output polarity can invert by command.
Channel clock output terminal.(44.1khz)L-ch at "L" level and R-ch at "H" level.
0
the output polarity can invert by command.
--
Digital GND terminal.
0
Bit clock output terminal.(1.4112MHz)
0
Audio data output terminal.
0
Digital data output terminal.
0
Buffer memory over signal output terminal. Over at "H" level.
Correction flag output terminal. At "H" level,AOUT output is made to correction
0
impossibility by C2 correction processing.
Subcode Q data CRCC check adjusting result output terminal.The adjusting
0
result is OK at "H" level.
Subcode P~W data readout clock input/output terminal.
I/O
This terminal can select by command bit.
--
Digital power supply voltage terminal.
--
Digital GND terminal.
0
Subcode P~W data output terminal.
0
Play-back frame sync signal output terminal.
0
Subcode block sync signal output terminal.
0
Processor status signal readout clock output terminal.
0
Processor status signal output terminal.
0
Correction frame clock output terminal. (7.35kHz)
Internal signal (DSP internal flag and PLL clock) output terminal.Selected by
0
command.This terminal output the text data with serial by command.
--
Digital power supply voltage terminal.
Test input/output terminal.Normally,keep at "L" level. The terminal that input-
I
ted the clock for read of text data by command.
--
PLL double reference voltage supply terminal.
O 2/4 times speed at "VREF" voltage.
O 1 bit DA converter zero detect flag output terminal.
O Phase difference signal output terminal of EFM signal and PLCK signal.
O TMAX detection result output terminal. Selected by command bit (TMPS)
O TMAX detection result output terminal. Selected by command bit (TMPS)
DIFFERENCE RESULT
Longer than fixed freq.
x
ao
u163
y
Shorter than fixed freq.
Within the fixed freq.
i
I
LPF amplifier inverting terminal for PLL.
O LPF amplifier output terminal for PLL.
-
PLL reference voltage supply terminal.
http://www.xiaoyu163.com
2 9
8
UHSO
HSO
PLAYBACK SPEED
H
H
Nomal
H
L
2 times
L
H
4 times
L
L
--
Q Q
3
6 7
1 3
1 5
TMAX OUTPUT
"P2VREF"
co
"VSS"
"Hiz"
.
REMARKS
9 4
2 8
With pull-up resistor.
0 5
8
2 9
9 4
2 8
2-state output
(PVREF,HiZ)
3-state output.
(P2VREF,
PVR,VSS)
3-state output.
(P2VREF,PVREF,
VSS)
3-state output.
m
(P2VREF,HiZ,VSS)
Analog input.
Analog output.
KD-S735R
9 9
--
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--
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--
--
--
9 9
--
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1-25
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