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DDR MEEORY
The unit adopts 2 chips 16M*16bit DDR SGRAM of 200M speed, 32-bit of data and 12 bit of
address.
FLASH and EEPROM
1M*16-bit of FLASH and 64K bit of EEPROM
10. DAP module (include AVC, SRS, TONE CONTROL, EQ ect,.)
11. Power part
Working principle of power:
The input AC power via EMC filter and rectification circuit, it sent to PFC(power factor correct L6563)
to output DC400V, which will be separated into two ways, one way via standby circuit (isolation D/D
convert FSDH321) output 5VAND 32V; another way via semi-bridge circuit(TEA1610T) output 24V,
18V, ect. At standby, power board send out Vsb(3.3V) to cut off 5VSC, 32VSC output by the control
of Standby signal and stop working of PFC circuit(L6563) and semi-bridge (TEA1610T). When turn
on, it makes all the IC working and output voltage.
L1653:PFC( power factor correct)
TEA1610T: Isolation D/D convert (400VDC converted to DC 24V, 18V, ect.)
FSDH321: Isolation D/D convert (400VDC converted to DC 5V, 32V, ect.)
FSDH321 block diagram is bellow:
Rectify
isolation
isolation
isolation
30
backlight
audio amplifier
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