General Information - Pioneer DRM-6NX Service Manual

Network cache changer
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7. GENERAL INFORMATION

7.1 IC
7 PD6287B: (IC702: MAIN BOARD ASSY)
¶ Flash Memory
¶ Pin Assignment (Top View)
¶ Block Diagram
RY/BY
WE
BYTE
RESET
CS
OE
Low Vcc Det.
A
A
0 –
16
A-
1
RY/BY
Buffer
Erace
Circuit
Control
Circuit
Write Circuit
Write/Erace
Circuit
Pulse Timer
¶ The information shown in the list is basic information and may
not correspond exactly to that shown in the schematic diagrams.
Vcc
Vss
Chip Enable
STB
Output Enable
Circuit
Y Decoder
STB
X Decoder
DRM-6NX
DQ
– DQ
0
15
15 – 22, 24 – 31
Input/Output
Buffer
Data Latch
Y Gate
2,097,152
bits
Cell Matrix
45

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