Overvoltage Protection - Hitachi C1422R Service Manual

Overvoltage Protection

An unfortunate characteristic of the buck converter is that if the power switch Q801 should become short-
circuit, the full rectified mains voltage appears at the output, over stressing components in both the PSU itself
and the load. In order to limit the output voltage rise under these conditions, a 130V 5W zener diode D805 is
fitted across the B+ output. An over-voltage causes conduction of D805, shorting the B+ output and blowing
the fuse F801.
Isolated Supplies
In order to provide low voltage isolated supplies, a secondary winding is included on the buck inductor,
phased such that energy is delivered in flyback mode, that is when Q801 is off. During this interval, the buck
inductor voltage is clamped to the output voltage and the turns ratio is chosen to provide a secondary of 10V
with rectification and smoothing performed by D807 and C812 and overload protection by R821. A
permanent 5V µP supply is derived from this 10V supply by I801 as well as an 8V switched supply under µP
control by Q804, R822, D808 and Q805.
Chassis Start-Up Procedure
The PSU topology used in the chassis has a characteristic which complicates start-up. Until a B+ load is
established (i.e. the line output stage starts), the isolated secondaries are very high impedance - simply
turning on the video processor 8V supply and waiting for line-drive to start-up would fail since the supply
cannot deliver I501's supply current. In order to overcome this problem, a system of 'pseudo line-drive' was
devised which allows the line output stage to be driven by the µP in order to establish a B+ load prior to turn-
on of the video processor 8V supply. Figure 6 is a block representation of this system.
12, 37
I501
H
OUT
The two line drive sources are OR-ed together at the input of I402, the two driver transistors being Q402 and
Q406. The µP is responsible for ensuring that both line drive sources cannot drive the output stage
simultaneously and to achieve this, the true line drive from I501 is monitored (µP pin 47). In this way, the
transition from pseudo to true line-drive is timed to the latter starting up. However, the line-drive stage does
not reliably operate at 31kHz so the soft-start cycle of I501 must be gated out. The µP achieves this by
keeping Q405 on for a fixed time after true line-drive has been detected thus keeping Q402 off. When this
time has elapsed, pseudo line-drive is stopped and Q405 turned off simultaneously, completing the start-up
sequence.
On reverting to stand-by pin 7 reverts to the high state which maintains I402 in conduction via Q406. This
maintains Q403 on and the line output transistor (Q404) off.
10V from PSU
Q402, R423
True Line
40
Q405, R422
Fig 6 Start-up Circuit Block Diagram
I402
8V Control
Q406, R427
Pseudo
7
Line
Drive
30 True Line
Drive
Gating
True Line
47
Drive
Detection
11
8V
8V
Q804, R822, D808, Q805
48
I701