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Portwell PGB-5120S User Manual

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PGB-5120S
Gaming Board
User's Manual
Version 1.1
Copyright © Portwell, Inc., 2014. All rights reserved.
All other brand names are registered trademarks of their respective owners.

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  • Page 1 PGB-5120S Gaming Board User's Manual Version 1.1 Copyright © Portwell, Inc., 2014. All rights reserved. All other brand names are registered trademarks of their respective owners.

  • Page 2: Table Of Contents

    Preface Table of Contents How to Use This Manual Chapter 1 System Overview ....................... 1-1 1.1 Introduction ....................... 1-1 1.2 Check List ......................1-2 1.3 Product Specification ..................1-2 1.3.1 Mechanical Drawing ................1-4 1.4 System Architecture ..................1-6 Chapter 2 Hardware Configuration ................... 2-1 2.1 Jumper Setting ....................

  • Page 3: How To Use This Manual

    Preface How to Use This Manual The manual describes how to configure your PGB-5120S system to meet various operating requirements. It is divided into five chapters, with each chapter addressing a basic concept and operation of Single Host Board. Chapter 1 : System Overview. Presents what you have in the box and give you an overview of the product specifications and basic system architecture for this series model of single host board.

  • Page 4: Chapter 1 System Overview

    System Overview Chapter 1 System Overview 1.1 Introduction PGB-5120S is an industrial All-in-one Game PCB compliant with world famous GLI & BMM regulation. Combine with either the Intel SandyBridge/IvyBridge processor, PGB-5120S provides powerful performance. It supports extraordinary features such as, “Non-Volatile RAM”, ”Triple Data Redundancy”,“...

  • Page 5: Check List

    System Overview Check List PGB-5120S series package should contain the following basic items: One PGB-5120S All-in-one Game PCB SATA power cable SATA signal cable If any of these items is damaged or missing, please contact your vendor and keep all packing materials for future replacement and maintenance.
  • Page 6 Mechanical& Environment Dimension 170mm(L) x 215mm(W) Typical: +12V, +5V, (+3.3V) Power Support ATX mode from 20pin input or AT mode from Requirement 20pin Golden Finger Operation Temperature: 0~60 °C Environment Storage Temperature: -20~85 °C Relative Humidity: 10~85%, non-condensing PGB-5120S User’s Manual...

  • Page 7: 1.3.1 Mechanical Drawing

    System Overview 1.3.1 Mechanical Drawing PGB-5120S User’s Manual...
  • Page 8 System Overview PGB-5120S User’s Manual...

  • Page 9: System Architecture

    System Overview 1.4 System Architecture System Architecture All of details operating relations are shown in All of details operating relations are shown in PGB-5120S System Block Diagram System Block Diagram. PGB-5120S System Block Diagram PGB-5120S User’s Manual...

  • Page 10: Chapter 2 Hardware Configuration

    Jumper Setting For user to customize PGB-5120S features. In the following sections, Short means covering a jumper cap over jumper pins; Open or N/C (Not Connected) means removing a jumper cap from jumper pins. Users can refer to Figure 1 and Figure 2 for the Jumper allocations.

  • Page 11: Connector Allocation

    Short 2-3 Note : The “ * ” mark for default setting JP2: COM6 J6_Pin4 CCTALK Pull High Voltage Jumper Setting Function Short 1-2 +12V * Short 3-4 Note : The “ * ” mark for default setting PGB-5120S User’s Manual...
  • Page 12 JP11: Programming Port for MCU JP11 Function Short 1-2-3-4-5-6 Programming Port for MCU JP12: Configure / Recovery Setting JP12 Function Short 1-2 Normal * Short 2-3 Configure Open Recovery Note : The “ * ” mark for default setting PGB-5120S User’s Manual...
  • Page 13 SATA * Note : The “ * ” mark for default setting JP22: SATA0 / SATA DOM0 Setting JP22 Function Short 1-2 SATA DOM Short 2-3 SATA * Note : The “ * ” mark for default setting PGB-5120S User’s Manual...
  • Page 14 Power in by Gold finger Disconnect 1-2 & 3-4 ATX power J30: GPI PULL HI 3.3V & 5V & +12V Function Short 2-4 GPI PULL HI 3.3V Short 3-4 GPI PULL HI 5V Short 4-6 GPI PULL HI +12V PGB-5120S User’s Manual...
  • Page 15 Power in Golden Finger 10P x 2 Golden Finger 36P x 2 Power and HDD LED COM5 4-wire RS-485 Header JP14 JTAG Programming Header JP16 JTAG Programming Header JP20 FPGA 3PX2 GPIO Header JP23 SATA Power Header PGB-5120S User’s Manual...
  • Page 16 Video GND VGA_DDD VGA_HSYNC VGA_VSYNC VGA_DDC J2:COM1,COM2 Connector Assignment Assignment DCD#1/DT- RXD#1/DT+ TXD#1/422R+ DTR#1/422R- DSR#1 RTS#1 CTS#1 RI#1 DCD#2 RXD#2 TXD#2 DTR#2 DSR#2 RTS#2 CTS#2 RI#2 J3:Audio Jack Connector Assignment Assignment Blue Line In Green Line Out Pink PGB-5120S User’s Manual...
  • Page 17 L2_MDC1 LED2_LINK# LAN2_ACT- LAN2_LINK1000 LAN2_LINK100 USBV2 USBD2N USBD2P USBG2 USBV3 USBD3N USBD3P USBG3 J6: COM6 CC Talk Connector Assignment Assignment CCTALK_V+ CCTALK3 J7: USB x 2 Header Assignment Assignment USBV6 USBV7 USBD6N USBD7N USBD6P USBD7P USBG6 USBG7 PGB-5120S User’s Manual...
  • Page 18 DCD#_4 RXD#_4 TXD#_4 DTR#_4 DSR#_4 RTS#_4 CTS#_4 RI4# J11: COM3 RS-232 Connector Assignment Assignment DCD#_3 RXD#_3 TXD#_3 DTR#_3 DSR#_3 RTS#_3 CTS#_3 RI3# J12: LPC Debug Port Header Assignment Assignment LAD0 VCC3 LAD1 PCI_RST# LAD2 LFRAME# LAD3 PCLK_TPM PGB-5120S User’s Manual...
  • Page 19 Assignment Assignment VCC3_ATX VCC3_ATX VCC3_ATX PS_ON# ATX_PWROK 5VSB +12V J15: CFEX Connector Assignment Assignment VCC3 CLK_SPI_CFEX R_SPI_MISO_CFEX SATA_TX3+ SATA_TX3- SPI_CS0#_CFEX SPI_MOSI_CFEX SATA_RX3- SATA_RX3+ SPI_WP#_CFEX LAD0 SMB_CLK_MAIN LAD1 V_3P3_EPW LAD2 LFRAME# LAD3 PLT_RST# CFEX_LPC_CLK SMB_DATA_MAIN LDRQ#1 SERIRQ PGB-5120S User’s Manual 2-10...
  • Page 20 (From Host to SATA) TX+ DGND AGND VCC5 VCC5 J19: SAS COM PORT Pin Connector Assignment Assignment Reserved TX COM TX Reserved RX COM RX J20: SATA / SATA DOM Connector Assignment Assignment PCH_SATA_TX0+ PCH_SATA_TX0- PCH_SATA_RX0- PCH_SATA_RX0+ GND / 5V_DOM PGB-5120S User’s Manual 2-11...
  • Page 21 J23: SYSFANOUT Header Assignment FANPWR2 SYSFANIN J24: CPUFANOUT Header Assignment FANPWR1 CPUFANIN J25: SO-DIMM Connector Reference standard SO-DIMM definition SPEC J26: Power in Golden Finger 10P x2 Assignment Assignment 5VSB_GF 5VSB_GF 5VSB_GF 5VSB_GF +12V +12V +12V +12V OC15 PGB-5120S User’s Manual 2-12...
  • Page 22 Hardware Configuration J27: Golden Finger 36P x 2 Assignment Assignment SPK_R+ SPK_L+ Intrusion0 Intrusion1 Intrusion2 Intrusion3 Intrusion4 Intrusion5 IN10 IN11 IN12 IN17 IN13 IN14 IN15 IN16 OC10 OC11 OC12 OC13 OC14 OC16 OC17 PGB-5120S User’s Manual 2-13...
  • Page 23 Pin 3 Pin 4 JP16: JTAG Programming Header JP16 Function Pin 1 VCCO Pin 2 Pin 3 Pin 4 JP20: FPGA 3PX2 GPIO Headr Assignment Assignment GPIO0 GPIO2 GPIO1 GPIO3 JP23: SATA Power Headr Assignment Assignment +12V PGB-5120S User’s Manual 2-14...

  • Page 24: Chapter 3 System Installation

    Alignment key Pin1 corner of the CPU Socket LGA-1155 CPU Notch Notch Yellow Triangle Pin1 of the CPU Please remember to locate the alignment keys on the CPU socket of the motherboard and the notches on the CPU. PGB-5120S User’s Manual...
  • Page 25 System Installation PGB-5120S User’s Manual...
  • Page 26 Before install the CPU, please make sure to turn off the power first!! 1. Open the load lever. 2. Lift the load lever up to fully open. 3. Remove the plastic cap on the CPU socket. Before you install the CPU, always cover it to protect the socket pin. PGB-5120S User’s Manual...
  • Page 27 Alignment key 5. Make sure the CPU has been seated well into the socket. If not, take out the CPU and reinstall. Alignment key 6. Engage the load lever while pressing down lightly onto the load plate. PGB-5120S User’s Manual...

  • Page 28: Main Memory

    8. Please make sure four hooks are in proper position before you install the cooler. Main Memory PGB-5120S provide 1 x204 pin DIMM sockets (Single Channel) which supports 1066/1333 DDR3-SDRAM as main memory, Non-ECC (Error Checking and Correcting), non-register functions. The maximum memory can be up to 4GB.

  • Page 29: Installing The Single Board Computer

    3.3.1 Intel® BD82H61 PCH Chipset PGB-5120S uses Intel BD82H61 PCH chipset. It’s a new chipset that some old operating systems might not be able to recognize. To overcome this compatibility issue, for Windows operating systems such as Windows XP, please install its INF before any of other Drivers are installed.
  • Page 30 The following table indicates how to enable/disable The following table indicates how to enable/disable Clear CMOS Function hardware Clear CMOS Function hardware circuit by putting jumpers at proper position. circuit by putting jumpers at proper position. Normal Clear PGB-5120S User’s Manual...

  • Page 31: Chapter 4 Bios Setup Information

    Chapter 4 BIOS Setup Information PGB-5120S uses AMI BIOS structure stored in Flash ROM. These BIOS has a built-in Setup program that allows users to modify the basic system configuration easily. This type of information is stored in CMOS RAM so that it is retained during power-off periods.

  • Page 32: Main

    The date format is <Day>, <Month> <Date> <Year>. Use [ ] or [ ] to configure system Date. System Time The time format is <Hour> <Minute> <Second>. Use [ ] or [ ] to configure system Time PGB-5120S User’s Manual...

  • Page 33: Advanced

    Use this menu to set up the items of special enhanced features Launch PXE OpROM Enable or Disable Boot Option for Legacy Network Devices. Choices: Disabled, Enabled. Launch Storage OpROM Enable or Disable Boot Option for Legacy Mass Storage devices with Option ROM. Choices: Disabled, Enabled. PGB-5120S User’s Manual...
  • Page 34 Choices: 32 PCI Bus Clocks, 64 PCI Bus Clocks, 96 PCI Bus Clocks, 128 PCI Bus Clocks, 160 PCI Bus Clocks, 192 PCI Bus Clocks, 224 PCI Bus Clocks, 248 PCI Bus Clocks. VGA Palette Snoop Enables or Disables VGA Palette Registers Snooping. Choices: Disabled, Enabled. PGB-5120S User’s Manual...
  • Page 35 PCI Express Settings Change PCI Express Devices Settings Relaxed Ordering Enables or Disables PCI Express Device Relaxed Ordering. Choices: Disabled, Enabled. Extended Tag If Enabled allows Device to use 8-bit Tag field as a requester. Choices: Disabled, Enabled. PGB-5120S User’s Manual...
  • Page 36 Link Status register. Value range from 1 to 100 uS. Choices: 1 to 100. Unpopulated Links In Order to save power, software will disable unpopulated PCI Express links, if this option set to ‘Disable Link’. Choices: Keep Link On, Disable Link. PGB-5120S User’s Manual...
  • Page 37 Select the highest ACPI Sleep state the system will enter when the SUSPEND button is pressed. Choices: Suspend Disabled, S1 (CPU Stop Clock), S3 (Suspend to RAM). Lock Legacy Resources Enables or Disables Lock of Legacy Resources. Choices: Disabled, Enabled. PGB-5120S User’s Manual...
  • Page 38 BIOS Setup Information CPU Configuration CPU Configuration Parameters Socket 0 CPU Information Socket specific CPU Information (Read Only) PGB-5120S User’s Manual...
  • Page 39 When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology. Choices: Disabled, Enabled. Power Technology Enable the power management features. Choices: Disabled, Energy Efficient, Custom. EIST Enabled/Disabled Intel SpeedStep. Choices: Disabled, Enabled. P-STATE Coordination Change P-STATE Coordination type. Choices: HW_ALL, SW_ALL, SW_ANY. PGB-5120S User’s Manual...
  • Page 40 Long duration power limit in Watts. Choices: 0-255. Long duration maintained Time window which the long duration power is maintained. Choices: 0-32000. Short duration power limit Short duration power limit in Watts. Choices: 0-255. SATA Configuration SATA Devices Configuration PGB-5120S User’s Manual 4-10...
  • Page 41 Enabled/Disabled Serial ATA Controller 1. Choices: Disabled, Enhanced. Thermal Configuration Thermal Configuration ME SMBus Thermal Reporting Enabled/Disabled ME SMBus Thermal Reporting Configuration. Choices: Disabled, Enabled. Thermal Data Reporting Thermal Data Reporting Enable. Choices: Disabled, Enabled. SMBus Buffer Length PGB-5120S User’s Manual 4-11...
  • Page 42 Thermal Sensor on DIMM0. Choices: Disabled, Enabled. Alert Enable Lock Lock all Alert Enable settings. Choices: Disabled, Enabled. PCH Alert PCH Alert pin enable. Choices: Disabled, Enabled. DIMM Alert DIMM Alert pin enable Choices: Disabled, Enabled. PGB-5120S User’s Manual 4-12...
  • Page 43 BIOS Setup Information Acoustic Management Configuration Menu for configuring Automatic Acoustic Management Automatic Acoustic Management Option to Enable or Disable Automatic Acoustic Management. Choices: Enabled, Disabled. Info Report Configuration Info Report Configuration PGB-5120S User’s Manual 4-13...
  • Page 44 Choices: Disabled, Enabled. Delay Time Post Report Wait Time: 0~10 Seconds. Choices: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, Until Press Esc. Intel IGD SWSCI Configuration Intel IGD SWSCI OpRegion Function DVMT Mode Select PGB-5120S User’s Manual 4-14...
  • Page 45 Choices: 128MB, 256MB, Maximum. IGD – Boot Type Select the Video Device which will be activated during POST. This has no effect if external graphics present. Choices: VBIOS Default, CRT, DVI, CRT+DVI. Intel TXT(LT) Configuration Intel Trusted Execution Technology PGB-5120S User’s Manual 4-15...
  • Page 46 The Time-out value for Control, Bulk, and Interrupt transfers. Choices: 1 sec, 5 sec, 10 sec, 20 sec. Device Reset time-out USB mass storage device Start Unit command time-out. Choices: 10 sec, 20 sec, 30 sec, 40 sec. PGB-5120S User’s Manual 4-16...
  • Page 47 Controller. ‘Auto’ uses default value: for a Root port it is 100ms, for a Hub port the delay is taken from Hub descriptor. Choices: Auto, Manual. Device Power-up delay in seconds Delay range is 1..40 seconds, in one second increments. Choices: 1-40. F81865 Super IO Configuration System Super IO Chip Parameters PGB-5120S User’s Manual 4-17...
  • Page 48 IO=3F8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2F8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=3E8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2E8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; PGB-5120S User’s Manual 4-18...
  • Page 49 IO=3F8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2F8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=3E8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2E8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; PGB-5120S User’s Manual 4-19...
  • Page 50 IO=3E8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2E8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2F0h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2E0h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; PGB-5120S User’s Manual 4-20...
  • Page 51 IO=3E8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2E8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2F0h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2E0h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; PGB-5120S User’s Manual 4-21...
  • Page 52 IO=3E8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2E8h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2F0h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; IO=2E0h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; PGB-5120S User’s Manual 4-22...
  • Page 53 IO=2E0h; IRQ=3, 4, 5, 6, 7, 10, 11, 12; Device Mode Change the Serial Port Mode Enable/Disable IR function. Choices: Disable IR1 function, Enable IR1 function, active pulse 1.6uS, Enable IR1 function, active pulse 3/16 bit time. PGB-5120S User’s Manual 4-23...
  • Page 54 Set watchdog timer value, the value can’t interrupt by Keyboard WDT Controller Enable WDT Controller Choices: Disabled, Enabled. Change Settings Select an optimal setting for Super IO device. Choices: WDT Disabled, 10 Seconds, 20 Seconds, 30 Seconds, 40 Seconds, 50 Seconds, 60 Seconds. PGB-5120S User’s Manual 4-24...
  • Page 55 BIOS Setup Information F81865 H/W Monitor Monitor hardware status SIO OVT Function Control Super IO OVT Function Choices: Disabled, Enabled. CPU Temp OVT Limit Adjust OVT temperature Limit value for CPU Temp, Min=30, Max=100 Choices: 30-100. PGB-5120S User’s Manual 4-25...

  • Page 56: Chipset

    BIOS Setup Information Chipset North Bridge North Bridge Parameters PGB-5120S User’s Manual 4-26...
  • Page 57 Choices: Disabled, Enabled, Auto. PEG Force Gen1 PCI Express Port Force Gen1. Choices: Disabled, Enabled. Detect Non-Compliance Device Detect Non-Compliance PCI Express Device in PEG. Choices: Disabled, Enabled. MRC Message Print Print Memory initialize message. Choices: Disabled, Enabled. PGB-5120S User’s Manual 4-27...
  • Page 58 Choices: Disabled, Enabled. SLP_S4 Assertion Stretch Enable Enabled/Disabled SLP_S4# Assertion Stretch. Choices: Disabled, Enabled. SLP_S4 Assertion Stretch Width Select a minimum assertion width of the SLP_S4# Assertion signal. Choices: 1-2 Seconds, 2-3 Seconds, 3-4 Seconds, 4-5 Seconds. PGB-5120S User’s Manual 4-28...
  • Page 59 High Precision Timer Enabled/Disabled the High Precision Event Timer. Choices: Disabled, Enabled. PCI Express Ports Configuration PCI Express Ports Configuration PCI Express Port 1-8 Enabled/Disabled the PCI Express Ports in the Chipset. Choices: Disabled, Enabled, Auto. PGB-5120S User’s Manual 4-29...
  • Page 60 PCI Express Port5, PCI Express Port6, PCI Express Port7, PCI Express Port8. USB Configuration USB Configuration All USB Devices Enabled/Disabled All USB Devices. Choices: Disabled, Enabled. EHCI Controller 1/2 Enabled/Disabled USB2.0 (EHCI) Support. Choices: Disabled, Enabled. USB Port 0-7 Enabled/Disabled USB Port 0-7. Choices: Disabled, Enabled. PGB-5120S User’s Manual 4-30...
  • Page 61 BIOS Setup Information Chipset Reference Board CRB board Parameters CIRA Trigger CIRA Trigger Enable/Disable. Choices: Disabled, Enabled. PGB-5120S User’s Manual 4-31...

  • Page 62: Boot

    When it is enabled, the BIOS will display the full-screen logo during the boot-up sequence, hiding normal POST messages. When it is disabled, the BIOS will display the normal POST messages, instead of the full-screen logo. PGB-5120S User’s Manual 4-32...
  • Page 63 Nor will you be able to gain access to their ROM setup utilities. Choices: Disabled, Enabled. Boot Option #1 Sets the system boot order. Choices: Realtek PXE B01 D00, other bootable devices, Disabled. PGB-5120S User’s Manual 4-33...
  • Page 64 Boot Option #1 Sets the system boot order. Choices: Realtek PXE B01 D00, Realtek PXE B02 D00, Disabled. Boot Option #2 Sets the system boot order. Choices: Realtek PXE B01 D00, Realtek PXE B02 D00, Disabled. PGB-5120S User’s Manual 4-34...

  • Page 65: Security

    BIOS Setup Information Security Use this menu to set supervisor and user passwords Administrator Password Set Setup Administrator Password. User Password Set User Password. PGB-5120S User’s Manual 4-35...

  • Page 66: Save & Exit

    Reset system setup without saving any changes. Pressing <Enter> on this item asks for confirmation: Reset without saving. Save Changes Save Changes done so far to any of the setup options. Pressing <Enter> on this item asks for confirmation: Save configuration. PGB-5120S User’s Manual 4-36...
  • Page 67 It can debug and dump the PCI Resource or jump to next bootable device. If it doesn’t have boot device, it will return to BIOS setup menu. If you want to know the shell command, you can visit the Intel official hyperlink as below. http://software.intel.com/en-us/articles/uefi-shell/#Internal_EFI_Shell_Commands PGB-5120S User’s Manual 4-37...

  • Page 68: Chapter 5 Troubleshooting

    Chapter 5 Troubleshooting This chapter provides a few useful tips to quickly get PGB-5120S running with success. As basic hardware installation has been addressed in Chapter 2, this chapter will primarily focus on system integration issues, in terms of BIOS setting, and OS diagnostics.

  • Page 69: Bios Setting

    To make sure that you have a successful start with PGB-5120S, it is recommended, when going with the boot-up sequence, to hit “DEL” or “F2”key and enter the BIOS setup menu to tune up a stable BIOS configuration so that you can wake up your system far well.

  • Page 70: Faq

    One long beep constantly DRAM error Change DRAM or reinstall it One long beep with two Monitor or Display Please check Monitor connector short beeps Card error whether it inserts properly Beep rapidly Power error warning Please check Power mode setting PGB-5120S User’s Manual...
  • Page 71 Question: How to update the BIOS file of the PGB-5120S? Answer: 1. Please visit web site of the Portwell download center as below hyperlink and register an account. (The E-Mail box should be an existing Company email address that you check regularly.) http://www.portwell.com.tw/member/newmember.php...

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