Sony STR-KS1000 Service Manual page 34

STR-KS1000
Q Q
3 7 6 3 1 5 1 5 0
• IC Block Diagrams
– IO Board – – MAIN Board –
IC1710 MC14052 BDR2 IC101 – 107 CXD9775M
16 VDD
2X0 1
15 X2
2X2 2
14 X1
2XCOM 3
13 XCOM
2X3
4
PWM BP 2
12 X0
2X1 5
INH 6 11 X3
RESET 4
VEE 7 10 A
DREG RTN 5
VSS 8 9 B
T E
L 1 3 9 4 2 2 9 6 5 1 3
PWM AP 17
w w w
STR-KS1000
GVDD
DVDD LOGIC SUPPLY
GND 1
GATE
PWM
DRIVE
RECEIVER
HS
TIMING
GND 3
CONTROL
DGND
CLOCK
(TCB)
GATE
DRIVE
LS
DIGITAL
DREG
REGULATOR
GVDD 6 GVDD
M3 7
DREG 8 DREG
DGND 9
M1 10
PROTECTION
M2 11
LOGIC
DVDD 12
OT
SD 13
&
UVP
GATE
DGND 14
DRIVE
LS
OTW 15
TIMING
CONTROL
DVDD
CLOCK
GND 16
(TCB)
GATE
PWM
DRIVE
RECEIVER
HS
GND 18
DGND LOGIC SUPPLY
GVDD
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IC108 – 110 CXD9876R
36 GVDD B
35 GVDD B
48 47
34 GND
33 BST B
32 PVDD B
31 PVDD B
30 OUT B
29 OUT B
28 GND
XVSS 1
VSUBC 2
VSSR 3
OUTR2 4
VDDR 5
PWM
OUTR1 6
7
VSSR
VSSL 8
9
OUTL2
10
VDDL
OUTL1 11
27 GND
VSSL 12
Q Q
26 OUT A
3 7 6
25 OUT A
24 PVDD A
23 PVDD A
22 BST A
21 GND
20 GVDD A
19 GVDD A
IC303 TK11118CSCL-G
5
OVER HEAT &
OVER CURRENT
PROTECTION
CONTROL
CIRCUIT
BANDGAP
REFERENCE
1 2
u 1 6 3
y
34 34
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2 4
8 9 9
46 45 44 43 42 41 40 39 38 37
CLOCK
GENERATOR
(SECONDARY)
FILTER &
LINER
GAIN
∆ Σ
LOW CUT
INTERPOLATOR
CONTROL
FILTER
INIT/ SERIAL
MUTE CONTROLLER
3 1 5 1 5 0 8 9 2
13 14 15 16 17 18 19 20 21 22 23 24
4
m
3
c o
.
2
8 9 9
CLOCK
GENERATOR 36 XFSIIN
(PRIMARY)
35 DVDD
34 TEST
33 BFVSS
32 BFVDD
31 DATA
SAMPLING
RATE S g P 30 BCK
CONVERTER
29 LRCK
28 MCKSEL
27 INIT
26 SFLAG
25 OVFFLAGL
4 9 8 2 9 9