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IC BLOCK DIAGRAM & DESCRIPTION
IC251 LC72722 (RDS Signal Processor )
Vdda
3
REFERENCE
VOLTAGE
Vssa
4
ANTIALIASING
2
MPXIN
FILTER
20
DO
CL
21
C C B
22
DI
CE
23
T1
7
T2
TEST
8
T3 to T7
9~11,16,17
Pin No.
1
VREF
2
MPXIN
5
FLOUT
6
CIN
3
Vdda
4
Vssa
12
XOUT
13
XIN
7
T1
8
T2
9
T3 (RDCL)
10
T4 (RDDA)
11
T5 (RSFT)
16
T6 (ERROR/57K/TP/BE1)
17
T7 (CORREC/ARI-ID/TA/BEO)
18
SYNC
19
RDS-ID
20
DO
21
CL
22
DI
23
CE
24
SYR
14
Vddd
15
Vssd
* Normally the output pin. Used as an I/O pin in test mode, which is not available to user applications.
FLOUT CIN
VREF
1
5
57kHz
BPF
SMOOTHING
(SCF)
FILTER
R A M
(24 BLOCK DATA)
MEMORY CONTROL
Pin name
Reference voltage output (Vdda/2)
Baseband (multiplexed) signal input
Subcarrier oitput (filter output)
Subcarrier input (comparator input)
Analog power supply (+5V)
Analog ground
Crystal oscillator output (4.332/8.664MHz)
Crystal oscillator input (external reference signal input)
Test input (This pin must always be connected to ground.)
Test input (standby control)
0:Normal operation.
1:Standby state (crystal oscillator stopped)
Test I/O (RDS clock output)
Test I/O (RDS data output)
Test I/O (soft decision control data output)
Test I/O (error status, regenceratcd carrier, TP, error block count outputs)
Test I/O (error corrcction status, SK datection,TA, error block count outputs)
Block synchronization output
RDS datection
Data output
Clock input
Data input
Chip enable
Synchronization and RAM address reset (active high)
Digital power supply (+5V)
Digital ground
6
PLL
(57kHz)
VREF
ERROR CORRECTION
(SOFT DECISION)
CLK(4.332MHz)
OSC / DIVIDER
12
13
XOUT
XIN
Function
Serial data interface (CCB)
- 25 -
CLOCK
RECOVERY
(1187.5Hz)
DATA
DECODER
SYNC/EC CONTROLLER
SYNC
SYNC
DETECT-1
DETECT-2
I/O
O
I
O
I
-
-
O
I
I/O*
O
I
-
-
Vddd
14
15
Vssd
19
RDS-ID
18
SYNC
24
SYR
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