Sony HMD-A200 Service Manual page 27

(3) Schematic Diagram of D (a-c) / D (USB) Boards
1 2
A
D
-a
(DEFLECTION)
B
C
H-DRIVER
D
+5V
CN906
7P
FB901
+5V 1
2UH
MENU
2
GND 3
LEFT- 4
RIGHT+
5
TO H BOARD
ORG
ORG LED 6
P701
E GRN
ORN LED 7
+5V
CN901
11P
+5V 1
SCL/D
2
SDA/D 3
PC/DET 4
CS 5
TO A BOARD
GND 6
CN303,CN306
SDA
7
SCL 8
F
GND 9
H/R
10
V/R 11
G
CN902
8P
V/IN 1
H/IN
2
VBLK 3
TO A BOARD G1 4
BPCLP
CN304 5
H SOG 6
GND 7
ABL 8
ac1
I
• Divided circuit diagram
One sheet of D board circuit diagram is divided into three
sheets, each having the code D-a to D-c . For example, the
destination ab1 on the D-a sheet is connected to ab1 on the
D-b sheet.
a b 1
Ref. No.
Circuit diagram division code
3 4 5 6
+5V
RN902
4.7K
IC901
ST7275
R901
CPU
1k
3.1
TITL
(PWM0) GND
2.7
SUB/TILT
(PWM1) GND
C924
2.2 R977
R976 5.0
50V 4.7k
1k
AUDIO/V
(PWM2) RESET
C923 R969
1 5.0
2.2 1k R970
50V 4.7k 1.2 H/CENTER
(PWM3)
ORANGE/LED
R905
3.2 0.7
JW
VG2
(PWM4)
C903 2.2 50V GREEN/LED 2.0
R971 R906
3.7
2k 100
H-SIZE
(PWM5) CS0
C904 2.2 50V 2.0
4E
0.5
R907 1k ABL
(PWM6) CS1
R974 2D 2.0
R908
33.2 2.5
1k
1%
H-DRV
C905
(PWM7) CS2
2.2
1D
50V
5.0 2 2.0
CE
R975 C906
(PWM8) CS3
30.1k 2.2 C908
+5V
1% 6C
50V 0.1
0.1
50V
VSS
NC
C907
0.1
10
VDD
BLANK/O
50V
6
2.2
0
MUTE
OSC/I
R910
2.3
10k
0 DEGAUSSING
OSC/O
R911 R927
10k 1M
4.9 PMG1
PMG1
U/VCC
4.9 PMG0
PMG0 U/DP
AUDIO
MUTE/LED
U/DM
C900 RN901
0.1 3.3K
50V
U/GND
4.9
R940 R916
R917
51k 1k 0.2
1k 1%
R915
R949 5.11k
4.9 4.9
10k 1%
C901 VFB
R941
4.7 510k
D909
50V
-0.6 4.9
HZ5C1
VSYNC/I
DSA/I
3
4.2 5.0
GND
SCL/I
5.0 0.7-4.0
SDA/D
+5V
R956
4.6 4.9 4.1
1k
SCL/D
+5V
0.2 4.9 5.0
Q907 PC/DET
2N3904
R950 R951 R955
SOG BUFF 4.9 1.7
10k 10k 4.7k
H/RTN
0
VSYNC/O
VSYNC/O VDD
4
0.4 0.5
HSYNC/O
HSYNC/O HSYNC/I
4.6
+5V
S.O.G
VSS
D911
R922
1SS119
4.7k
R921
470
R953 JW
• D - a BOARD WAVEFORMS
1 2
3.2 Vp-p (H) 3.4 Vp-p (H)
Schematic diagram
5-15
D
-a board
7 8 9
IC903
M51951BSL
RESET +5V
5.0
OUT IN
GND
R933
C917 10k
1000p
50V
R5E6 C5E4
75K 10
50V
R5E7
51K
0.3
6
7 2
5
3
ORG
IC504(2/2)
+5V 0.3
LM358N
GRN C5E6 R5E8
0.1 910
50V
R930
10k -15V
CS0
IC504(1/2)
R929
LM358N
10k
AMP
CS1
R928
10k
CS2
+5V
CS3
R972 R925
4.7k 22
D903
1SS119
R923
22
+5V
X901 C916
24MHz 47p 50V
+5V
C915
47p 50V
R968 R919
4.7k 100
R961
1k
R967 1%
IC902
8.2k
M24C16BN6
EEPROM
+5V
VCC A0
4.9
C914
TEST A1
10
50V
SCL A2
5.0
SDA VSS
4.9
+5V
D908
R926 R924 C913
22 22 100p HZ5C1
R918 50V
20k
+5V
C930 C910
0.1 10 C912
50V 50V D905 R973 100p
D910 D906 0.5
HZ5C1 MTZJ5.1A 1k 50V
1SS119
R963
0.5
2.4k
Q908
2N3904
R965
H SYNC AMP
10k
D907
MTZJ5.1A
4 5
3
5.0 Vp-p (H) 2.8 Vp-p (24MHz)
4.0 Vp-p (V)
l l l l l
10
11 12
ab15
ab1
+15V
ab2
+5V
C406
0.0033 D402 R403
1N4001
100V 3.3 1/2W
R405 C404
820 1000 25V
R402 C408
0.8
2.1k 470
1% 35V
+15V Q401
2SC945
-14.3
V BLK ab3
2
0.6 0.7
6
R5F2 ab4
7 3
R410 C407 R409
27 +
3k 0.022 10k
1W
100V 5
0.7
Q5E2
2SD667A 1
- 0.1
TILT DRIVE
C409 4 R407 C405
IC401
1000p R401 200 0.22
-2.0 LA78040
100V 2k 1W 50V
R5E9 -1.4
V OUT
100
C403
8
0.022
100V
C5E8 R5F3
1 R404 R406
0.22 2.2
0.82 2.4
50V
1W
-2.0
4
C402
470
Q5E3
25V
2SB647A -15V
R5F5 R5F4
TILT DRIVE
470 430
CN505
R5F1
10K
C5E9
C5E7 0.22 R5F6
0.0033 100V 50V 2.2
1/2W
ab16
Q526
RN1203
BPCLP CONT
0.8 R411 R412
IC501 R413
6.81k 6.81k
TDA4856 1K
1% 1%
DEFLECTION
CONTROL
0.2 0.8
0.1
HUNLOCK CLBL
R510
5.0 0.4
100
SCL HSYNC HSYNC/O
R511
4.9 6 0
100
SDA VSYNC VSYNC/O
7 2.9
C512 C513
COR VOUT1
100p 100p
50V 50V
8 2.9
VSOMD VOUT2
C502
3.2 9 2.8
0.1 63V
+12V
ab5
VAGC EWDRV
R502
3.1
22.1k 1%
VREF VCC
C503
2.7
0.1 63V
C510
R508 R522
VCAP DGND 1000
18.2k 4.7k
25V
C504 R513 1%
5.7
0.01 100V 100
ab6
GNDS HDRV
10
R503 4.7k
R571
HPLL1 PGND
15k
C505 R500
2.4
0.1 63V 10
HBUF BDRV ab7
R505
R504
2.8k
1.18k 1.0 5.3
1%
1%
HREF BIN ab8
C506
0.01
2.6 2.5
100V
HCAP BSENS
4.5 1.5
HPLL2 BOP ab9
C507
5.4 2.5
0.0047
100V
HSMOD XRAY
6.1
C509
FOCUS HFLB
3300p
100V
6.3 0.2
R501
27k
ab10
D501
R506 C508
10k 100p 1SS119
50V
ab17
D520 R5C8
JW
JW
ab11
ab12
ab13
ab14
B-SS3509<J>-D..-P1-24
6 7 8
5.0 Vp-p (H) 5.0 Vp-p (V) 3.0 Vp-p (V)
5-16
13
TILT(ROTATION)
COIL
9 0
2.0 Vp-p (V) 12.0 Vp-p (H)